coreboot/src
Jeremy Compostella a69d537e61 soc/intel/cannonlake: Use common UART device list driver
Remove platform-specific uart.c and switch to the common UART device
list driver. This eliminates duplicate code.

The cannonlake uart.c simply defined uart_devices[] array. The common
driver now handles this using the PCI_UART_DEVFNn macro defined in
pci_devs.h.

This commit:
- Adds PCI_DEVFN_UART* aliases pointing to PCH_DEVFN_UART* for naming
  consistency with common code
- Selects SOC_INTEL_COMMON_FEATURE and
  SOC_INTEL_COMMON_FEATURE_UART_DEVICES in Kconfig
- Removes uart.c and updates Makefile.mk

Change-Id: I819dc9853b4b44eb97238c1d5ad464dd9ccf7f9a
Signed-off-by: Jeremy Compostella <jeremy.compostella@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/91248
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2026-02-25 16:04:39 +00:00
..
acpi acpi/dsdt_top.asl: Move RBUF out of the _CRS method 2026-02-09 15:20:48 +00:00
arch treewide: Move check-ramstage-overlap variables 2026-02-11 20:00:57 +00:00
commonlib commonlib/list: Change to circular list 2026-02-13 15:17:00 +00:00
console console: Fix flushing for slow consoles 2025-10-02 22:44:46 +00:00
cpu cpu/intel: Use existing defines for MTRR_CAP_MSR 2026-02-24 16:19:26 +00:00
device dram/ddr3: Add speed in MT/s 2026-02-19 19:20:43 +00:00
drivers drivers/intel/dtbt: Add discrete Thunderbolt driver 2026-02-17 14:23:40 +00:00
ec ec/google/chromeec: Replace CFR enums with booleans 2026-02-23 14:56:45 +00:00
include cpu/intel/smm/gen1: Optimize cpu_has_alternative_smrr 2026-02-24 16:19:14 +00:00
lib lib/dimm_info_util.c: Handle 16-bit memory bus extension for ECC 2026-02-19 19:20:28 +00:00
mainboard Revert "mb/google/fatcat: Fix Gen4 SSD power sequencing" 2026-02-25 10:47:39 +00:00
northbridge nb/intel/haswell: Fix DDR frequency reporting 2026-02-24 16:18:51 +00:00
sbom sbom: Fix build with merged bootblock and romstage 2025-07-07 14:29:29 +00:00
security soc/intel/common: Add opt-in runtime control for BIOS SMM write 2026-01-29 14:41:46 +00:00
soc soc/intel/cannonlake: Use common UART device list driver 2026-02-25 16:04:39 +00:00
southbridge nb/intel/haswell: Do not print ME status twice 2026-02-24 16:18:56 +00:00
superio sio/nuvoton/nct6776: Switch to common init code 2026-02-19 19:19:43 +00:00
vendorcode vc/intel/fsp/fsp2_0/wildcatlake: Update WCL FSP headers to version WCL.3515.03 2026-02-23 16:18:09 +00:00
Kconfig arch/x86: Add support for socketed CPUs 2026-02-11 13:22:49 +00:00