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lib/dimm_info_util.c: Handle 16-bit memory bus extension for ECC

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Some silicon initialization modules, like OpenSIL report bus width
extension as 16 bits for ECC for DDR5 memories. Handle this case
correctly for DDR5 and LPDDR5 memories by reporting appropriate
bitfield of the SPD width. This field is used later by coreboot to
calculate the bus extension again, which results in 16bit extension
for ECC.

Change-Id: Ia0a9c221a5d047dd7feb212027f5da2399ccb8e1
Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/89482
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
This commit is contained in:
Michał Żygowski 2025-10-06 11:23:57 +02:00 • committed by Matt DeVillier
commit bf148cae0a
1 changed files with 7 additions and 0 deletions
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7
src/lib/dimm_info_util.c
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@ -45,6 +45,13 @@ uint8_t smbios_bus_width_to_spd_width(uint8_t ddr_type, uint16_t total_width,
else
out |= SPD_ECC_8BIT;
break;
case 16:
if (ddr_type == MEMORY_TYPE_DDR5 || ddr_type == MEMORY_TYPE_LPDDR5)
out |= SPD_ECC_8BIT_LP5_DDR5;
else
printk(BIOS_NOTICE, "Unknown number of extension bits %hu\n",
extension_bits);
break;
case 0:
/* No extension bits */
break;