Revert "mb/google/fatcat: Fix Gen4 SSD power sequencing"

This reverts commit 9702010123.

Fatcat RVP is sometimes unable to boot when non-serial image is flashed.
Reverting this CL until permanent verified fix is landed.

BUG=b:487523987
TEST=Able to boot fatcat to OS from Gen4 SSD slot

Change-Id: I5c61879cfb6e5f54d439284d1f75db5bfceddd1d
Signed-off-by: Pranava Y N <pranavayn@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/91422
Reviewed-by: <srinivas.kulkarni@intel.com>
Reviewed-by: Avi Uday <aviuday@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subratabanik@google.com>
Reviewed-by: Jayvik Desai <jayvik@google.com>
This commit is contained in:
Pranava Y N 2026-02-25 15:09:03 +05:30 committed by Subrata Banik
commit e31d32443e
2 changed files with 6 additions and 11 deletions

View file

@ -285,17 +285,14 @@ static const struct pad_config wwan_disable_pads[] = {
};
/* Gen4 NVME: at the top M.2 slot */
static const struct pad_config pre_mem_gen4_ssd_pwr_seq1_pads[] = {
static const struct pad_config pre_mem_gen4_ssd_pwr_pads[] = {
/* GPP_B10: GEN4_SSD_PWREN */
PAD_CFG_GPO(GPP_B10, 0, PLTRST),
};
static const struct pad_config pre_mem_gen4_ssd_pwr_seq2_pads[] = {
static const struct pad_config gen4_ssd_pads[] = {
/* GPP_B10: GEN4_SSD_PWREN */
PAD_CFG_GPO(GPP_B10, 1, PLTRST),
};
static const struct pad_config gen4_ssd_pads[] = {
/* GPP_B09: M2_GEN4_SSD_RESET_N */
PAD_CFG_GPO(GPP_B09, 1, PLTRST),
};
@ -621,11 +618,11 @@ void fw_config_configure_pre_mem_gpio(void)
GPIO_CONFIGURE_PADS(pre_mem_wwan_pwr_seq1_pads);
if (fw_config_probe(FW_CONFIG(STORAGE, STORAGE_NVME_GEN4))) {
GPIO_CONFIGURE_PADS(pre_mem_gen4_ssd_pwr_seq1_pads);
GPIO_CONFIGURE_PADS(pre_mem_gen4_ssd_pwr_pads);
} else if (fw_config_probe(FW_CONFIG(STORAGE, STORAGE_NVME_GEN5))) {
GPIO_CONFIGURE_PADS(pre_mem_gen5_ssd_pwr_pads);
} else if (fw_config_probe(FW_CONFIG(STORAGE, STORAGE_UNKNOWN))) {
GPIO_CONFIGURE_PADS(pre_mem_gen4_ssd_pwr_seq1_pads);
GPIO_CONFIGURE_PADS(pre_mem_gen4_ssd_pwr_pads);
GPIO_CONFIGURE_PADS(pre_mem_gen5_ssd_pwr_pads);
}
@ -648,10 +645,6 @@ void fw_config_configure_pre_mem_gpio(void)
if (fw_config_probe(FW_CONFIG(FP, FP_PRESENT)))
GPIO_CONFIGURE_PADS(pre_mem_fp_enable_pads);
if (fw_config_probe(FW_CONFIG(STORAGE, STORAGE_NVME_GEN4)) ||
fw_config_probe(FW_CONFIG(STORAGE, STORAGE_UNKNOWN))) {
GPIO_CONFIGURE_PADS(pre_mem_gen4_ssd_pwr_seq2_pads);
}
}
void fw_config_gpio_padbased_override(struct pad_config *padbased_table)

View file

@ -57,6 +57,8 @@ static const struct pad_config gpio_table[] = {
PAD_CFG_NF_IOSTANDBY_IGNORE(GPP_B03, NONE, DEEP, NF3),
/* GPP_B09: M2_GEN4_SSD_RESET_N */
PAD_CFG_GPO(GPP_B09, 1, PLTRST),
/* GPP_B10: GEN4_SSD_PWREN */
PAD_CFG_GPO(GPP_B10, 1, PLTRST),
/* GPP_B11: MOD_TCSS1_DISP_HPD3 */
PAD_CFG_NF(GPP_B11, NONE, DEEP, NF2),
/* GPP_B12: PM_SLP_S0_N */