soc/intel/cannonlake: Use common UART device list driver
Remove platform-specific uart.c and switch to the common UART device list driver. This eliminates duplicate code. The cannonlake uart.c simply defined uart_devices[] array. The common driver now handles this using the PCI_UART_DEVFNn macro defined in pci_devs.h. This commit: - Adds PCI_DEVFN_UART* aliases pointing to PCH_DEVFN_UART* for naming consistency with common code - Selects SOC_INTEL_COMMON_FEATURE and SOC_INTEL_COMMON_FEATURE_UART_DEVICES in Kconfig - Removes uart.c and updates Makefile.mk Change-Id: I819dc9853b4b44eb97238c1d5ad464dd9ccf7f9a Signed-off-by: Jeremy Compostella <jeremy.compostella@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/91248 Reviewed-by: Matt DeVillier <matt.devillier@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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4 changed files with 7 additions and 18 deletions
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@ -59,6 +59,8 @@ config SOC_INTEL_CANNONLAKE_BASE
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select SOC_INTEL_COMMON_BLOCK_THERMAL_PCI_DEV
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select SOC_INTEL_COMMON_BLOCK_XHCI
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select SOC_INTEL_COMMON_BLOCK_XHCI_ELOG
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select SOC_INTEL_COMMON_FEATURE
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select SOC_INTEL_COMMON_FEATURE_UART_DEVICES
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select SOC_INTEL_COMMON_FSP_RESET
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select SOC_INTEL_COMMON_NHLT
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select SOC_INTEL_COMMON_PCH_CLIENT
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@ -15,7 +15,6 @@ bootblock-y += i2c.c
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bootblock-y += spi.c
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bootblock-y += lpc.c
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bootblock-y += p2sb.c
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bootblock-y += uart.c
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romstage-y += cnl_memcfg_init.c
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romstage-y += gspi.c
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@ -25,7 +24,6 @@ romstage-y += pcie_rp.c
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romstage-y += pmutil.c
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romstage-y += reset.c
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romstage-y += spi.c
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romstage-y += uart.c
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ramstage-y += acpi.c
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ramstage-y += chip.c
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@ -46,7 +44,6 @@ ramstage-y += pmutil.c
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ramstage-y += reset.c
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ramstage-y += spi.c
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ramstage-y += systemagent.c
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ramstage-y += uart.c
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ramstage-y += vr_config.c
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ramstage-y += sd.c
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ramstage-y += xhci.c
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@ -55,20 +52,17 @@ smm-y += elog.c
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smm-y += p2sb.c
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smm-y += pmutil.c
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smm-y += smihandler.c
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smm-y += uart.c
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smm-y += xhci.c
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postcar-y += pmutil.c
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postcar-y += i2c.c
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postcar-y += gspi.c
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postcar-y += spi.c
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postcar-y += uart.c
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verstage-y += gspi.c
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verstage-y += i2c.c
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verstage-y += pmutil.c
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verstage-y += spi.c
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verstage-y += uart.c
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ifeq ($(CONFIG_SOC_INTEL_CANNONLAKE_PCH_H),y)
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bootblock-y += gpio_cnp_h.c
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@ -204,4 +204,9 @@
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#define PCH_DEV_GBE _PCH_DEV(LPC, 6)
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#define PCH_DEV_TRACEHUB _PCH_DEV(LPC, 7)
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/* for common code */
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#define PCI_DEVFN_UART0 PCH_DEVFN_UART0
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#define PCI_DEVFN_UART1 PCH_DEVFN_UART1
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#define PCI_DEVFN_UART2 PCH_DEVFN_UART2
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#endif
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@ -1,12 +0,0 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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#include <commonlib/helpers.h>
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#include <soc/pci_devs.h>
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const unsigned int uart_devices[] = {
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PCH_DEVFN_UART0,
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PCH_DEVFN_UART1,
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PCH_DEVFN_UART2,
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};
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const int uart_devices_size = ARRAY_SIZE(uart_devices);
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