Cleans up a nit identified by Martin when adding a very similar
variant.
Change-Id: Id19054c08643cf03b2afbfe4c8929ce9dacaea5c
Signed-off-by: Keith Hui <buurin@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/86910
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nicholas Chin <nic.c3.14@gmail.com>
The pro_3500_series was converted to a variant to include the Pro 3400, so rename the corresponding documentation.
Change-Id: I5977f223d6f004a801e163397d1c97febd7ee1d4
Signed-off-by: Vesek <venda.straka@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/85846
Reviewed-by: Nicholas Chin <nic.c3.14@gmail.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Based on autoport and HP Pro 3500.
As part of this change renamed 3500 to 3x00 and added this as
it's variant.
It's an almost identical board to the 3500 but has a smaller flash.
Other differences between boards were identified by autoport.
They may or may not important but were included anyway.
Tested on HP Pro 3400, behaves exactly as 3500 described in the docs.
Changes were not significant enough to require retesting on 3500.
Change-Id: I833996f6eddcaac91fb0ad0cd95fcc2a99447387
Signed-off-by: Vesek <venda.straka@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/85825
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
* Move x86_64 documentation to dedicated page
* Update with better description of current implementation
* Update TODOs
Change-Id: Ia5ba51be629a8c878aad64d3297176457cf8e855
Signed-off-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/79160
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: David Hendricks <david.hendricks@gmail.com>
Implements a way for CFR options to depend on another option
being set to one or more specific values. This is achieved
by writing a list of values as a varbinary struct.
Change-Id: Iaf7965551490969052eb27c207fa524470d4dd6a
Signed-off-by: Filip Brozovic <fbrozovic@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/85987
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-by: Sean Rhodes <sean@starlabs.systems>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Document the board and how to flash coreboot.
Change-Id: Id585b064054b338ea8cead6edb6c5153030b9cde
Signed-off-by: Alicja Michalska <alicja.michalska@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/85680
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nicholas Chin <nic.c3.14@gmail.com>
Document the board and process of building/flashing coreboot on it.
Change-Id: I5d60508dbde10373b0da2fb4ece0992760d3121c
Signed-off-by: Alicja Michalska <ahplka19@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/81611
Reviewed-by: Nicholas Chin <nic.c3.14@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
In the Gerrit guidelines there is an old link pointing to the retired
coreboot wiki (https://www.coreboot.org/Git#Commit_messages) when the
commit message guidelines are referenced. Indeed this section was never
ported over to the new documentation and is missing.
This commit rewrites this guidelines and adds them as a new section
based on what was in the wiki and updates the link accordingly.
Change-Id: I1cd2b13da6fe59697d677c7350d73eda5d486544
Signed-off-by: Werner Zeh <werner.zeh@siemens.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/85915
Reviewed-by: Maximilian Brune <maximilian.brune@9elements.com>
Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
The link to the document 'A Tour Beyond BIOS - Implementing UEFI
Authenticated Variables in SMM with EDK II' is currently pointing to a
dead location at Intel's website. Fix it by changing it to point at
tianocore's github site and hope that this one will be more reliable
over time.
Change-Id: Ic6ba341cbd37edec142f8868ffe9ef677736b3dd
Signed-off-by: Werner Zeh <werner.zeh@siemens.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/85916
Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Previous redirect to the Wikipedia page for GPIO led to nowhere.
Change-Id: I22dc606623dbc32af463e4501f1f21c119453792
Signed-off-by: libreandre <openrc@posteo.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/85868
Reviewed-by: Elyes Haouas <ehaouas@noos.fr>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Since commit 34a7e66faa ("util/cbfstool: Add a new mechanism to
provide a memory map") the ext-win-base and ext-win-size option has been
replaced with the "--mmap" option.
Signed-off-by: Maximilian Brune <maximilian.brune@9elements.com>
Change-Id: I33cfb59d9dbe88c4f618301ac1506e3281b1a483
Reviewed-on: https://review.coreboot.org/c/coreboot/+/85619
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
Reviewed-by: Nicholas Chin <nic.c3.14@gmail.com>
- Add step for building ifdtool (might not be obvious)
- Remove "./ifdtool COREBOOT_NAME" because it does nothing
- Add a small comment explaining what the -d and -x args do.
Signed-off-by: Maximilian Brune <maximilian.brune@9elements.com>
Change-Id: I868ea8918a1566cfade3bc161117f2ca8dfed31d
Reviewed-on: https://review.coreboot.org/c/coreboot/+/85235
Reviewed-by: Nicholas Chin <nic.c3.14@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
Fix some typos and also update the naming convention of
`CFR_OPTFLAG_GRAYOUT` to `CFR_OPTFLAG_INACTIVE` as per reviews.
Signed-off-by: Lean Sheng Tan <sheng.tan@9elements.com>
Change-Id: Id66808382b93e32c58024462c18b20c2a89d6d23
Reviewed-on: https://review.coreboot.org/c/coreboot/+/85780
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Christian Walter <christian.walter@9elements.com>
Those documents have been moved to the archive.
Previous URLs now point to the documentation hub.
Change-Id: Ibb478b56d02842dc05475235b0fe80ab6c4e7d04
Signed-off-by: Daniel Maslowski <info@orangecms.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/84815
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Maxim <max.senia.poliak@gmail.com>
Reviewed-by: Nicholas Sudsgaard <devel+coreboot@nsudsgaard.com>
Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
Also drop the 24.11 release notes template.
Change-Id: Ifeb88a1bb4f05183ac9274de9b26970b6155017d
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/85683
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Introduce a mechanism so that coreboot can provide a list of options to
post-coreboot code. The options are grouped together into forms and
have a meaning name and optional help text. This can be used to let
payloads know which options should be displayed in a setup menu,
for instance. Although this system was written to be used with edk2,
it has been designed with flexibility in mind so that other payloads
can also make use of this mechanism. The system currently lacks a way
to describe where to find option values.
This information is stored in a set of data structures specifically
created for this purpose. This format is known as CFR, which means
"coreboot forms representation" or "cursed forms representation".
Although the "forms representation" is borrowed from UEFI, CFR can
be used in non-UEFI scenarios as well.
The data structures are implemented as an extension of cbtables records
to support nesting. It should not break backwards compatibility because
the CFR root record (LB_TAG_CFR_ROOT) size includes all of its children
records. The concept of record nesting is borrowed from the records for
CMOS options. It is not possible to reuse the CMOS records because they
are too closely coupled with CMOS options; using these structures would
needlessly restrict more capable backends to what can be done with CMOS
options, which is undesired.
Because CFR supports variable-length components, directly transforming
options into CFR structures is not a trivial process. Furthermore, CFR
structures need to be written in one go. Because of this, abstractions
exist to generate CFR structures from a set of "setup menu" structures
that are coreboot-specific and could be integrated with the devicetree
at some point. Note that `struct sm_object` is a tagged union. This is
used to have lists of options in an array, as building linked lists of
options at runtime is extremely impractical because options would have
to be added at the end of the linked list to maintain option order. To
avoid mistakes defining `struct sm_object` values, helper macros exist
for supported option types. The macros also provide some type checking
as they initialise specific union members.
It should be possible to extend CFR support for more sophisticated
options like fan curve points. Feedback about this is highly
appreciated.
Change-Id: I304de7d26d79245a2e31a6d01f6c5643b31cb772
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/74121
Reviewed-by: Christian Walter <christian.walter@9elements.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Format bare URLs as links so that they are rendered as hyperlinks
instead of plain text.
Change-Id: I234d395cddd58f3d3dfb4b4ddccb6efc70d4dd9e
Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/85433
Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Add information about how the symlink target can be used
to develop and test additions to the coreboot tree from
site-local.
Change-Id: I75f9e9575005e9ee2f255848a21c5e57c30e9e72
Signed-off-by: Nicolas Kochlowski <nickkochlowski@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/84740
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Ana Carolina Cabral
Reviewed-by: Nicholas Chin <nic.c3.14@gmail.com>
Fix the syntax [1] for the footnote about the onboard memory
configuration so that it renders properly in the generated html.
This also fixes a "Unknown target name" error when building with
newer versions of Sphinx (tested with 8.1.3).
[1] https://myst-parser.readthedocs.io/en/latest/syntax/typography.html#footnotes
Change-Id: I07a85b854a181794f82d8e6a739063d66378d2c7
Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/85412
Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Elyes Haouas <ehaouas@noos.fr>
* Add initial board commit based on HP 8200 SFF and HP Z220 SFF.
* Add documentation.
Tested on HP 8300 SFF.
Change-Id: Ib5322acc0210f000b53954e2925549358f86d5c8
Signed-off-by: Michał Zieliński <michal.zielinski@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/67666
Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
Reviewed-by: David Hendricks <david.hendricks@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Alicja Michalska <ahplka19@gmail.com>
These acronyms have been found while looking at the datasheet of the
JH7110 RISC-V SOC.
Signed-off-by: Maximilian Brune <maximilian.brune@9elements.com>
Change-Id: I82104b88e7723b73810f20d5f4dffe6ed8a9ab78
Reviewed-on: https://review.coreboot.org/c/coreboot/+/83847
Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Update documentations:
- ME cleaner has been tested on the fw6b.
- More observations on the stock firmware is documented.
- Compatible boards are listed along with the original manufacturer.
Signed-off-by: Xue Yao <xueyao@xyte.ch>
Change-Id: I4938d81d57fc8172fefcc00222806fff0735d503
Reviewed-on: https://review.coreboot.org/c/coreboot/+/63016
Reviewed-by: Martin L Roth <gaumless@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
It may come with 8th or 9th Gen CPUs. i5-8500T has been tested here.
Works:
- Serial adapter from daughter board (COM1 connector)
- USB ports front and back
- USB-C port (charging, data)
- HDMI
- Ethernet
- SATA
- NVMe
- internal speaker
- TPM2.0
- PCIe x8 port (x8 riser tested, x4 not)
Does not work:
- front audio jacks
Change-Id: Iea1dc5745c0ecf687fa18b793f0aab4b0855d6d4
Signed-off-by: Maciej Pijanowski <maciej.pijanowski@3mdeb.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/80609
Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Use the -W (--fail-on-warning) flag of sphinx-build to tell it to exit
with an error if any warnings are generated. This is intended to fail
the coreboot-docs-gerrit build to help catch issues.
To allow all warnings to be output in the same build, use the
--keep-going flag so that the author is able to see all issues and
address them after a single build. Note that this behavior is enabled by
default as of Sphinx 8.1 and this option may be removed in the future.
It is added here for compatibility with older versions of Sphinx,
including the doc.coreboot.org container which uses 7.2.6.
Change-Id: I3aa564b79d4d4125a3800023b1b805bf4a50b10a
Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/84886
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
Ditaa is a utility to convert ascii block diagrams into bitmap graphics.
The latest sphinx-contrib-ditaa extension has not been updated since
2022 [1] and does not declare whether it is safe for parallel reading,
causing sphinx to issue a warning as we use the `-j auto` flag to
parallelize the build. It doesn't seem like anyone ever used it in the
docs aside from a now abandoned patch [2], so just remove it.
[1] https://pypi.org/project/sphinxcontrib-ditaa/
[2] https://review.coreboot.org/c/coreboot/+/37643
Change-Id: I460ce24aab203cbb416888787fc6e2c613d306b3
Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/84887
Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Util_readme adds comments to the top of the generated Doc/util.md file
to indicate that it is generated and should not be edited directly.
These comments are not intended to show up in the rendered HTML output.
Since Markdown does not have a native way of adding comments, the
`[comment text]: #` syntax is often used to mark the line as a comment.
This takes advantage of the fact that references (often used throughout
the docs to list long URLs at the end of the document and reference them
in inline links) aren't rendered. However, MyST parser detects these as
a duplicate reference and issues a warning, since both lines use "//" as
the comment text.
Address this by using HTML comments, since Markdown also allows raw HTML
to be used. This seems like a cleaner option compared to repurposing
references and appears to have better compatibility with various
Markdown readers, which may be useful if someone wants to read the
documentation outside of doc.coreboot.org.
While we are here, regenerate Documentation/util.md and util/README.md
Change-Id: Ibd4f61009c01c7b64594d88c5d86e472f0ccaa6c
Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/84885
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
Sphinx outputs "document isn't included in any toctree" warnings for a
few files in the Documentation tree, so address this by adding them to
toctrees or explicitly marking them as excluded.
- mb/starlabs/common/building.md: Add to the Star Labs toctree in
mainboard/index.md
- RFC/intel-gpio-cleanup.md: Mark as orphan to explicitly exclude it
from the docs.
- drivers/dt_entries.md: This was already accessible through an inline
link in drivers/index.md, but links do not add items to toctrees. Add
a hidden toctree listing dt_entries.md to define its heirarchy in the
documentation while preserving the inline link instead of moving the
link to a single item list like a normal toctree would. The content of
this document did not fit the existing toctree in drivers/index.md,
which appears to list drivers, while dt_entries discusses connecting
those drivers to the devicetree.
Change-Id: I5fd6851a3adf6c91d81298fc61f773dae6eeca19
Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/84245
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
This change reiterates that the coreboot leadership may revoke a user's
privileges. This does not change anything, as it already says "The
community organizers may take any action they deem appropriate, up to
and including a temporary ban or permanent expulsion from the community
without warning".
Also add a note that the discussions are private. If someone wants to
make the issue public, the coreboot leadership can't stop them, but the
board believes in handling these issues privately.
Finally, add a note that if there's an issue with someone on the
arbitration board, issues may be taken directly to the leadership board.
Change-Id: I5e2010a16f31f892bd1761b56b96ea773877dea0
Signed-off-by: Martin Roth <gaumless@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/80619
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Eric Lai <ericllai@google.com>
Reviewed-by: David Hendricks <david.hendricks@gmail.com>
The original URL now points to "AMD Documentation Hub" and not the
document.
Change-Id: Icc42943340132843df2387cc1203178a0774a387
Signed-off-by: Nicholas Sudsgaard <devel+coreboot@nsudsgaard.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/84720
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Add targeted feature list for Xeon 6 coreboot. The listed features
are targeted to be supported by Xeon 6 coreboot design, while some
specific items might need fixes and improvements per community
feedback.
Change-Id: Ibecd63dfca10712223ccdd943109ba28ed668200
Signed-off-by: Shuo Liu <shuo.liu@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/84701
Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Commit 5e0d370610 ("Documentation/soc/intel/xeon_sp: Update doc to
use real FSP headers") had some unresolved review comments for
formats after it had been submitted. Take care of these comments in
this follow-up.
Change-Id: I7b33bed56fdd86d7b4ab5bfefcd3abc4a3ba4ce9
Signed-off-by: Shuo Liu <shuo.liu@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/84583
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
I'm not doing that stuff anymore so this updates the documentation
to reflect reality.
Change-Id: I2feac471274ccfb756ca5b029ec86f2161dc2bfc
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/84673
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
Tested using `edk2` from
`github.com/starlabsltd/edk2/tree/uefipayload_vs`:
* Windows 11
* Ubuntu 24.04
No known issues.
https://starlabs.systems/pages/starfighter-specification
Signed-off-by: Sean Rhodes <sean@starlabs.systems>
Change-Id: I046e70845a5201d6f6ab062aee91fa8be9728737
Reviewed-on: https://review.coreboot.org/c/coreboot/+/74445
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
