mb/starlabs/starbook: Add Alder Lake-N (N200) variant
Tested using `edk2` from `https://github.com/starlabsltd/edk2/tree/uefipayload_vs`: * Ubuntu 24.04 * Manjaro 24 No known issues. https://starlabs.systems/pages/starbook-specification Change-Id: Id45e31b61046748a57c8104081f689057621bb04 Signed-off-by: Sean Rhodes <sean@starlabs.systems> Reviewed-on: https://review.coreboot.org/c/coreboot/+/85714 Reviewed-by: Paul Menzel <paulepanter@mailbox.org> Reviewed-by: Matt DeVillier <matt.devillier@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Sean Rhodes
parent
4ba0dec657
commit
98f2f488eb
14 changed files with 1119 additions and 9 deletions
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@ -336,6 +336,7 @@ StarLite Mk IV <starlabs/lite_glkr.md>
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StarLite Mk V <starlabs/lite_adl.md>
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StarBook Mk V <starlabs/starbook_tgl.md>
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StarBook Mk VI <starlabs/starbook_adl.md>
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StarBook Mk VII (N200) <starlabs/starbook_adl_n.md>
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Byte Mk II <starlabs/byte_adl.md>
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StarFighter Mk I <starlabs/starfighter_rpl.md>
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88
Documentation/mainboard/starlabs/starbook_adl_n.md
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88
Documentation/mainboard/starlabs/starbook_adl_n.md
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@ -0,0 +1,88 @@
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# StarBook Mk V
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## Specs
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- CPU (full processor specs available at <https://ark.intel.com>)
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- Intel N200 (Alder Lake)
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- EC
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- ITE IT5570E
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- Backlit keyboard, with standard PS/2 keycodes and SCI hotkeys
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- Battery
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- USB-C PD Charger
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- Suspend / resume
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- GPU
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- Intel® Iris® Xe Graphics
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- GOP driver is recommended, VBT is provided
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- eDP 14-inch 3840x2160 LCD
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- HDMI video
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- USB-C DisplayPort video
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- Memory
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- 2 x DDR4 SODIMM
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- Networking
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- AX210 2230 WiFi / Bluetooth
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- Sound
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- Realtek ALC269-VB6
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- Internal speakers
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- Internal microphone
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- Combined headphone / microphone 3.5-mm jack
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- HDMI audio
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- USB-C DisplayPort audio
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- Storage
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- M.2 PCIe SSD
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- RTS5129 MicroSD card reader
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- USB
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- 1920x1080 CCD camera
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- USB 3.1 Gen 2 (left)
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- USB 3.1 Gen 2 Type-A (left)
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- USB 3.1 Gen 1 Type-A (right)
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- USB 2.0 Type-A (right)
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## Building coreboot
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Please follow the [Star Labs build instructions](common/building.md) to build coreboot, using `config.starlabs_starbook_adl` as config file.
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### Preliminaries
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Prior to building coreboot the following files are required:
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* Intel Flash Descriptor file (descriptor.bin)
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* Intel Management Engine firmware (me.bin)
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* ITE Embedded Controller firmware (ec.bin)
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The files listed below are optional:
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- Splash screen image in Windows 3.1 BMP format (Logo.bmp)
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These files exist in the correct location in the StarLabsLtd/blobs repo on GitHub which is used in place of the standard 3rdparty/blobs repo.
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### Build
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The following commands will build a working image:
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```bash
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make distclean
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make defconfig KBUILD_DEFCONFIG=configs/config.starlabs_starbook_adl_n
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make
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```
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## Flashing coreboot
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```{eval-rst}
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+---------------------+------------+
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| Type | Value |
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+=====================+============+
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| Socketed flash | no |
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+---------------------+------------+
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| Vendor | Winbond |
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+---------------------+------------+
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| Model | W25Q256.V |
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+---------------------+------------+
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| Size | 32 MiB |
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+---------------------+------------+
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| Package | SOIC-8 |
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+---------------------+------------+
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| Internal flashing | yes |
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+---------------------+------------+
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| External flashing | yes |
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+---------------------+------------+
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```
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Please see [here](common/flashing.md) for instructions on how to flash with fwupd.
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@ -67,7 +67,6 @@ config BOARD_STARLABS_STARBOOK_TGL
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config BOARD_STARLABS_STARBOOK_ADL_COMMON
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def_bool n
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select BOARD_ROMSIZE_KB_32768
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select BOARD_STARLABS_STARBOOK_SERIES
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select DRIVERS_INTEL_PMC
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select EC_STARLABS_CHARGING_SPEED
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@ -79,18 +78,26 @@ config BOARD_STARLABS_STARBOOK_ADL_COMMON
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select MAINBOARD_HAS_TPM2
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select MEMORY_MAPPED_TPM
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select SOC_INTEL_ALDERLAKE
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select SOC_INTEL_ALDERLAKE_PCH_P
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select SOC_INTEL_COMMON_BLOCK_TCSS
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select SOC_INTEL_CRASHLOG
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select SPI_FLASH_WINBOND
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select TPM_MEASURED_BOOT
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config BOARD_STARLABS_STARBOOK_ADL
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select BOARD_ROMSIZE_KB_32768
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select BOARD_STARLABS_STARBOOK_ADL_COMMON
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select SOC_INTEL_ALDERLAKE_PCH_P
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config BOARD_STARLABS_STARBOOK_ADL_N
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select BOARD_ROMSIZE_KB_16384
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select BOARD_STARLABS_STARBOOK_ADL_COMMON
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select SOC_INTEL_ALDERLAKE_PCH_N
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config BOARD_STARLABS_STARBOOK_RPL
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select BOARD_ROMSIZE_KB_32768
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select BOARD_STARLABS_STARBOOK_ADL_COMMON
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select DRIVERS_INTEL_USB4_RETIMER
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select SOC_INTEL_COMMON_BLOCK_TCSS
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select SOC_INTEL_ALDERLAKE_PCH_P
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select SOC_INTEL_ENABLE_USB4_PCIE_RESOURCES
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select SOC_INTEL_RAPTORLAKE
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@ -99,8 +106,8 @@ if BOARD_STARLABS_STARBOOK_SERIES
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config CCD_PORT
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int
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default 6 if BOARD_STARLABS_LABTOP_CML
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default 4 if BOARD_STARLABS_STARBOOK_ADL || BOARD_STARLABS_STARBOOK_RPL
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default 3
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default 3 if BOARD_STARLABS_LABTOP_KBL || BOARD_STARLABS_STARBOOK_TGL
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default 4
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config CONSOLE_SERIAL
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default n if !EDK2_DEBUG
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@ -164,12 +171,14 @@ config MAINBOARD_FAMILY
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default "B5" if BOARD_STARLABS_STARBOOK_TGL
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default "B6-I" if BOARD_STARLABS_STARBOOK_ADL
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default "B62-I" if BOARD_STARLABS_STARBOOK_RPL
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default "B7-N" if BOARD_STARLABS_STARBOOK_ADL_N
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config MAINBOARD_PART_NUMBER
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default "LabTop Mk III" if BOARD_STARLABS_LABTOP_KBL
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default "LabTop Mk IV" if BOARD_STARLABS_LABTOP_CML
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default "StarBook Mk V" if BOARD_STARLABS_STARBOOK_TGL
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default "StarBook Mk VI" if BOARD_STARLABS_STARBOOK_ADL || BOARD_STARLABS_STARBOOK_RPL
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default "StarBook Mk VII" if BOARD_STARLABS_STARBOOK_ADL_N
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config MAINBOARD_SMBIOS_PRODUCT_NAME
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default "LabTop" if BOARD_STARLABS_LABTOP_KBL || BOARD_STARLABS_LABTOP_CML
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@ -183,14 +192,14 @@ config POWER_STATE_DEFAULT_ON_AFTER_FAILURE
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default n
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config SOC_INTEL_CSE_SEND_EOP_EARLY
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default n if BOARD_STARLABS_STARBOOK_ADL || BOARD_STARLABS_STARBOOK_RPL
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default n
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config UART_FOR_CONSOLE
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default 0 if BOARD_STARLABS_STARBOOK_ADL || BOARD_STARLABS_STARBOOK_RPL
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default 2
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default 2 if BOARD_STARLABS_LABTOP_KBL || BOARD_STARLABS_LABTOP_CML || BOARD_STARLABS_STARBOOK_TGL
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default 0
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config USE_PM_ACPI_TIMER
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default n if BOARD_STARLABS_STARBOOK_TGL || BOARD_STARLABS_STARBOOK_ADL || BOARD_STARLABS_STARBOOK_RPL
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default n
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config VBOOT
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select VBOOT_VBNV_FLASH
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@ -201,5 +210,6 @@ config VARIANT_DIR
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default "tgl" if BOARD_STARLABS_STARBOOK_TGL
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default "adl" if BOARD_STARLABS_STARBOOK_ADL
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default "rpl" if BOARD_STARLABS_STARBOOK_RPL
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default "adl_n" if BOARD_STARLABS_STARBOOK_ADL_N
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endif
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@ -16,3 +16,6 @@ config BOARD_STARLABS_STARBOOK_ADL
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config BOARD_STARLABS_STARBOOK_RPL
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bool "Star Labs StarBook Mk VI (i3-1315U and i7-1360P)"
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config BOARD_STARLABS_STARBOOK_ADL_N
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bool "Star Labs StarBook Mk VII (N200)"
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10
src/mainboard/starlabs/starbook/variants/adl_n/Makefile.mk
Normal file
10
src/mainboard/starlabs/starbook/variants/adl_n/Makefile.mk
Normal file
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@ -0,0 +1,10 @@
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## SPDX-License-Identifier: GPL-2.0-only
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bootblock-y += gpio.c
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romstage-y += romstage.c
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ramstage-y += devtree.c
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ramstage-y += gpio.c
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ramstage-y += hda_verb.c
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ramstage-y += ramstage.c
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14
src/mainboard/starlabs/starbook/variants/adl_n/board.fmd
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14
src/mainboard/starlabs/starbook/variants/adl_n/board.fmd
Normal file
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@ -0,0 +1,14 @@
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FLASH 0x1000000 {
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SI_ALL 0x600000 {
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SI_DESC 0x1000
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SI_ME 0x412000
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}
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SI_BIOS 0xa00000 {
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EC@0x0 0x20000
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RW_MRC_CACHE@0x20000 0x10000
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SMMSTORE@0x30000 0x40000
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CONSOLE@0x70000 0x20000
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FMAP@0x90000 0x1000
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COREBOOT(CBFS)
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}
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}
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BIN
src/mainboard/starlabs/starbook/variants/adl_n/data.vbt
Normal file
BIN
src/mainboard/starlabs/starbook/variants/adl_n/data.vbt
Normal file
Binary file not shown.
269
src/mainboard/starlabs/starbook/variants/adl_n/devicetree.cb
Normal file
269
src/mainboard/starlabs/starbook/variants/adl_n/devicetree.cb
Normal file
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@ -0,0 +1,269 @@
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chip soc/intel/alderlake
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# FSP UPDs
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register "eist_enable" = "true"
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register "enable_c6dram" = "true"
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register "sagv" = "SaGv_Enabled"
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# Serial I/O
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register "serial_io_i2c_mode" = "{
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[PchSerialIoIndexI2C0] = PchSerialIoSkipInit,
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[PchSerialIoIndexI2C3] = PchSerialIoPci,
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}"
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register "common_soc_config" = "{
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.i2c[3] = {
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.speed = I2C_SPEED_FAST,
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},
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}"
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register "serial_io_uart_mode" = "{
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[PchSerialIoIndexUART0] = PchSerialIoSkipInit,
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}"
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# Power
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register "pch_slp_s3_min_assertion_width" = "2" # 50ms
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register "pch_slp_s4_min_assertion_width" = "3" # 1s
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register "pch_slp_sus_min_assertion_width" = "3" # 500ms
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register "pch_slp_a_min_assertion_width" = "3" # 2s
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register "pmc_gpe0_dw0" = "PMC_GPP_F"
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register "pmc_gpe0_dw1" = "PMC_GPP_C"
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register "pmc_gpe0_dw2" = "PMC_GPP_E"
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# Device Tree
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device domain 0 on
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device ref igpu on
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register "gfx" = "GMA_DEFAULT_PANEL(0)"
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register "ddi_portA_config" = "1"
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register "ddi_ports_config" = "{
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[DDI_PORT_A] = DDI_ENABLE_HPD,
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[DDI_PORT_B] = DDI_ENABLE_HPD | DDI_ENABLE_DDC,
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[DDI_PORT_1] = DDI_ENABLE_HPD,
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}"
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end
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device ref gna on end
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device ref xhci on
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# Motherboard USB 3.0 Type-C Front 9557 mil
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register "usb2_ports[1]" = "USB2_PORT_TYPE_C(OC_SKIP)"
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register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC_SKIP)"
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# Motherboard USB 3.0 Type-C Back 7893 mil
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register "usb2_ports[2]" = "USB2_PORT_TYPE_C(OC_SKIP)"
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register "usb3_ports[3]" = "USB3_PORT_DEFAULT(OC_SKIP)"
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# Motherboard USB 3.0 Type-A 8916 mil
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register "usb2_ports[6]" = "USB2_PORT_MID(OC_SKIP)"
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register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC_SKIP)"
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# Daughterboard USB 3.0 Type-A 2229 mil
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register "usb2_ports[0]" = "USB2_PORT_SHORT(OC_SKIP)"
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register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC_SKIP)"
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# Internal Webcam 9070 mil
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register "usb2_ports[CONFIG_CCD_PORT]" = "USB2_PORT_MID(OC_SKIP)"
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# Daughterboard USB 2.0 Type-A + SD Card Reader 1836 mil
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register "usb2_ports[3]" = "USB2_PORT_SHORT(OC_SKIP)"
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# Internal Bluetooth 723 mil
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register "usb2_ports[7]" = "USB2_PORT_SHORT(OC_SKIP)"
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chip drivers/usb/acpi
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device ref xhci_root_hub on
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chip drivers/usb/acpi
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register "desc" = ""Back USB Type-C""
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register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
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register "group" = "ACPI_PLD_GROUP(0, 0)"
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device ref usb2_port2 on end
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end
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chip drivers/usb/acpi
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register "desc" = ""USB Type-C Back""
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register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
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register "group" = "ACPI_PLD_GROUP(0, 0)"
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device ref usb3_port3 on end
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end
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chip drivers/usb/acpi
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register "desc" = ""Front USB Type-C""
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register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
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register "group" = "ACPI_PLD_GROUP(0, 1)"
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device ref usb2_port3 on end
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end
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chip drivers/usb/acpi
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register "desc" = ""Front USB Type-C""
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register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
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register "group" = "ACPI_PLD_GROUP(0, 1)"
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device ref usb3_port4 on end
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end
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chip drivers/usb/acpi
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register "desc" = ""Left USB Type-A""
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register "type" = "UPC_TYPE_USB3_A"
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register "group" = "ACPI_PLD_GROUP(0, 2)"
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device ref usb2_port7 on end
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end
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chip drivers/usb/acpi
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register "desc" = ""Left USB Type-A""
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register "type" = "UPC_TYPE_USB3_A"
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register "group" = "ACPI_PLD_GROUP(0, 2)"
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device ref usb3_port1 on end
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end
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chip drivers/usb/acpi
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register "desc" = ""Right USB Type-A""
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register "type" = "UPC_TYPE_USB3_A"
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register "group" = "ACPI_PLD_GROUP(0, 2)"
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device ref usb2_port1 on end
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end
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chip drivers/usb/acpi
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register "desc" = ""Right USB Type-A""
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register "type" = "UPC_TYPE_USB3_A"
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register "group" = "ACPI_PLD_GROUP(0, 2)"
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device ref usb3_port2 on end
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end
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chip drivers/usb/acpi
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register "desc" = ""Internal Webcam""
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register "type" = "UPC_TYPE_INTERNAL"
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register "group" = "ACPI_PLD_GROUP(0, 4)"
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device ref usb2_port5 on end
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end
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chip drivers/usb/acpi
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register "desc" = ""USB 2.0 Hub""
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register "type" = "UPC_TYPE_HUB"
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register "group" = "ACPI_PLD_GROUP(0, 5)"
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device ref usb2_port4 on end
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end
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chip drivers/usb/acpi
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register "desc" = ""Internal Bluetooth""
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register "type" = "UPC_TYPE_INTERNAL"
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register "group" = "ACPI_PLD_GROUP(0, 6)"
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register "is_intel_bluetooth" = "true"
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register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_A13)"
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register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_A13)"
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device ref usb2_port8 on end
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end
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end
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end
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end
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device ref i2c0 on end
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device ref i2c3 on
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chip drivers/i2c/hid
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register "generic.hid" = ""STAR0001""
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register "generic.desc" = ""Touchpad""
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register "generic.irq" = "ACPI_IRQ_LEVEL_LOW(GPP_E12_IRQ)"
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register "hid_desc_reg_offset" = "0x20"
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device i2c 2c on end
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end
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end
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device ref shared_sram on end
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device ref pcie_rp7 on # WiFi
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chip drivers/wifi/generic
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register "enable_cnvi_ddr_rfim" = "true"
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device generic 0 on end
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end
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register "pch_pcie_rp[PCH_RP(7)]" = "{
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.clk_src = 1,
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.clk_req = 1,
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.flags = PCIE_RP_LTR | PCIE_RP_AER,
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.pcie_rp_aspm = ASPM_L0S_L1,
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.PcieRpL1Substates = L1_SS_L1_2,
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}"
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smbios_slot_desc "SlotTypePciExpressGen3X1"
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"SlotLengthShort"
|
||||
"M.2/M 2230"
|
||||
"SlotDataBusWidth1X"
|
||||
chip soc/intel/common/block/pcie/rtd3
|
||||
register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D13)"
|
||||
register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_H2)"
|
||||
register "srcclk_pin" = "1"
|
||||
register "add_acpi_dma_property" = "true"
|
||||
register "skip_on_off_support" = "true"
|
||||
register "ext_pm_support" = "ACPI_PCIE_RP_EMIT_ALL"
|
||||
register "use_rp_mutex" = "true"
|
||||
device generic 0 on end
|
||||
end
|
||||
end
|
||||
device ref pcie_rp9 on # SSD x4
|
||||
register "pch_pcie_rp[PCH_RP(9)]" = "{
|
||||
.clk_src = 0,
|
||||
.clk_req = 0,
|
||||
.flags = PCIE_RP_LTR | PCIE_RP_AER,
|
||||
.pcie_rp_aspm = ASPM_L0S_L1,
|
||||
.PcieRpL1Substates = L1_SS_L1_2,
|
||||
.pcie_rp_detect_timeout_ms = 50,
|
||||
|
||||
}"
|
||||
smbios_slot_desc "SlotTypeM2Socket3"
|
||||
"SlotLengthLong"
|
||||
"M.2/M 2280"
|
||||
"SlotDataBusWidth4X"
|
||||
chip soc/intel/common/block/pcie/rtd3
|
||||
register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D16)"
|
||||
register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_H0)"
|
||||
register "srcclk_pin" = "0"
|
||||
register "is_storage" = "true"
|
||||
register "add_acpi_dma_property" = "true"
|
||||
register "skip_on_off_support" = "true"
|
||||
register "ext_pm_support" = "ACPI_PCIE_RP_EMIT_ALL"
|
||||
register "use_rp_mutex" = "true"
|
||||
device generic 0 on end
|
||||
end
|
||||
end
|
||||
device ref uart0 on end
|
||||
device ref pch_espi on
|
||||
register "gen1_dec" = "0x00040069"
|
||||
register "gen2_dec" = "0x00fc0e01"
|
||||
register "gen3_dec" = "0x00fc0f01"
|
||||
|
||||
chip drivers/pc80/tpm
|
||||
device pnp 0c31.0 on end
|
||||
end
|
||||
|
||||
chip ec/starlabs/merlin
|
||||
# Port pair 4Eh/4Fh
|
||||
device pnp 4e.00 on end # IO Interface
|
||||
device pnp 4e.01 off end # Com 1
|
||||
device pnp 4e.02 off end # Com 2
|
||||
device pnp 4e.04 off end # System Wake-Up
|
||||
device pnp 4e.05 off end # PS/2 Mouse
|
||||
device pnp 4e.06 on # PS/2 Keyboard
|
||||
io 0x60 = 0x0060
|
||||
io 0x62 = 0x0064
|
||||
irq 0x70 = 1
|
||||
end
|
||||
device pnp 4e.0a off end # Consumer IR
|
||||
device pnp 4e.0f off end # Shared Memory/Flash Interface
|
||||
device pnp 4e.10 off end # RTC-like Timer
|
||||
device pnp 4e.11 off end # Power Management Channel 1
|
||||
device pnp 4e.12 off end # Power Management Channel 2
|
||||
device pnp 4e.13 off end # Serial Peripheral Interface
|
||||
device pnp 4e.14 off end # Platform EC Interface
|
||||
device pnp 4e.17 off end # Power Management Channel 3
|
||||
device pnp 4e.18 off end # Power Management Channel 4
|
||||
device pnp 4e.19 off end # Power Management Channel 5
|
||||
end
|
||||
end
|
||||
device ref pmc hidden
|
||||
chip drivers/intel/pmc_mux
|
||||
device generic 0 on
|
||||
chip drivers/intel/pmc_mux/conn
|
||||
use usb2_port2 as usb2_port
|
||||
use usb3_port3 as usb3_port
|
||||
device generic 0 alias conn0 on end
|
||||
end
|
||||
chip drivers/intel/pmc_mux/conn
|
||||
use usb2_port3 as usb2_port
|
||||
use usb3_port4 as usb3_port
|
||||
device generic 1 alias conn1 on end
|
||||
end
|
||||
end
|
||||
end
|
||||
end
|
||||
device ref hda on
|
||||
subsystemid 0x1e50 0x7038
|
||||
register "pch_hda_sdi_enable[0]" = "true"
|
||||
register "pch_hda_audio_link_hda_enable" = "true"
|
||||
register "pch_hda_idisp_codec_enable" = "true"
|
||||
register "pch_hda_idisp_link_frequency" = "HDA_LINKFREQ_96MHZ"
|
||||
register "pch_hda_idisp_link_tmode" = "HDA_TMODE_8T"
|
||||
end
|
||||
device ref smbus on end
|
||||
end
|
||||
end
|
||||
66
src/mainboard/starlabs/starbook/variants/adl_n/devtree.c
Normal file
66
src/mainboard/starlabs/starbook/variants/adl_n/devtree.c
Normal file
|
|
@ -0,0 +1,66 @@
|
|||
/* SPDX-License-Identifier: GPL-2.0-only */
|
||||
|
||||
#include <chip.h>
|
||||
#include <cpu/intel/turbo.h>
|
||||
#include <device/device.h>
|
||||
#include <device/pci_def.h>
|
||||
#include <option.h>
|
||||
#include <static.h>
|
||||
#include <types.h>
|
||||
#include <variants.h>
|
||||
|
||||
void devtree_update(void)
|
||||
{
|
||||
config_t *cfg = config_of_soc();
|
||||
|
||||
struct soc_intel_common_config *common_config;
|
||||
common_config = chip_get_common_soc_structure();
|
||||
|
||||
struct soc_power_limits_config *soc_conf_4core =
|
||||
&cfg->power_limits_config[ADL_N_041_6W_CORE];
|
||||
|
||||
struct device *gna_dev = pcidev_on_root(0x08, 0);
|
||||
|
||||
uint8_t performance_scale = 100;
|
||||
|
||||
/* Set PL4 to 1.0C */
|
||||
soc_conf_4core->tdp_pl4 = 65;
|
||||
|
||||
/* Set PL1 to 50% of PL2 */
|
||||
soc_conf_4core->tdp_pl1_override = (soc_conf_4core->tdp_pl2_override / 2) & ~1;
|
||||
|
||||
/* Scale PL1 & PL2 based on CMOS settings */
|
||||
switch (get_power_profile(PP_POWER_SAVER)) {
|
||||
case PP_POWER_SAVER:
|
||||
performance_scale -= 50;
|
||||
common_config->pch_thermal_trip = 20;
|
||||
break;
|
||||
case PP_BALANCED:
|
||||
performance_scale -= 25;
|
||||
common_config->pch_thermal_trip = 15;
|
||||
break;
|
||||
case PP_PERFORMANCE:
|
||||
/* Use the Intel defaults */
|
||||
common_config->pch_thermal_trip = 10;
|
||||
break;
|
||||
}
|
||||
|
||||
soc_conf_4core->tdp_pl1_override = (soc_conf_4core->tdp_pl1_override * performance_scale) / 100;
|
||||
soc_conf_4core->tdp_pl2_override = (soc_conf_4core->tdp_pl2_override * performance_scale) / 100;
|
||||
|
||||
/* Enable/Disable Bluetooth based on CMOS settings */
|
||||
if (get_uint_option("wireless", 1) == 0)
|
||||
cfg->usb2_ports[9].enable = 0;
|
||||
|
||||
/* Enable/Disable Webcam based on CMOS settings */
|
||||
if (get_uint_option("webcam", 1) == 0)
|
||||
cfg->usb2_ports[CONFIG_CCD_PORT].enable = 0;
|
||||
|
||||
/* Enable/Disable Card Reader based on CMOS Settings */
|
||||
if (get_uint_option("card_reader", 1) == 0)
|
||||
cfg->usb2_ports[3].enable = 0;
|
||||
|
||||
/* Enable/Disable GNA based on CMOS settings */
|
||||
if (get_uint_option("gna", 0) == 0)
|
||||
gna_dev->enabled = 0;
|
||||
}
|
||||
458
src/mainboard/starlabs/starbook/variants/adl_n/gpio.c
Normal file
458
src/mainboard/starlabs/starbook/variants/adl_n/gpio.c
Normal file
|
|
@ -0,0 +1,458 @@
|
|||
/* SPDX-License-Identifier: GPL-2.0-only */
|
||||
|
||||
#include <variants.h>
|
||||
|
||||
/* Early pad configuration in bootblock */
|
||||
const struct pad_config early_gpio_table[] = {
|
||||
/* H10: UART0 RXD Debug Connector */
|
||||
PAD_CFG_NF(GPP_H10, NONE, DEEP, NF2),
|
||||
/* H11: UART0 TXD Debug Connector */
|
||||
PAD_CFG_NF(GPP_H11, NONE, DEEP, NF2),
|
||||
};
|
||||
|
||||
const struct pad_config *variant_early_gpio_table(size_t *num)
|
||||
{
|
||||
*num = ARRAY_SIZE(early_gpio_table);
|
||||
return early_gpio_table;
|
||||
}
|
||||
|
||||
/* Pad configuration in ramstage. */
|
||||
const struct pad_config gpio_table[] = {
|
||||
/* GPD0: Battery Low */
|
||||
PAD_CFG_NF(GPD0, NONE, DEEP, NF1),
|
||||
/* GPD1: Charger Connected */
|
||||
PAD_CFG_NF(GPD1, NONE, DEEP, NF1),
|
||||
/* GPD2: LAN Wake */
|
||||
PAD_NC(GPD2, NONE),
|
||||
/* GPD3: Power Button */
|
||||
PAD_CFG_NF(GPD3, UP_20K, DEEP, NF1),
|
||||
/* GPD4: Sleep S3 */
|
||||
PAD_CFG_NF(GPD4, NONE, DEEP, NF1),
|
||||
/* GPD5: Sleep S4 */
|
||||
PAD_CFG_NF(GPD5, NONE, DEEP, NF1),
|
||||
/* GPD6: Sleep A */
|
||||
PAD_CFG_NF(GPD6, NONE, DEEP, NF1),
|
||||
/* GPD7: Power Adapter Disable */
|
||||
PAD_CFG_GPO(GPD7, 0, PWROK),
|
||||
/* GPD8: Suspend Clock */
|
||||
PAD_CFG_NF(GPD8, NONE, DEEP, NF1),
|
||||
/* GPD9: Wireless LAN Sleep */
|
||||
PAD_CFG_NF(GPD9, NONE, DEEP, NF1),
|
||||
/* GPD10: Sleep S5 */
|
||||
PAD_CFG_NF(GPD10, NONE, DEEP, NF1),
|
||||
/* GPD11: LAN PHY Enable */
|
||||
PAD_NC(GPD11, NONE),
|
||||
|
||||
/* A0: ESPI IO 0 */
|
||||
/* A1: ESPI IO 1 */
|
||||
/* A2: ESPI IO 2 */
|
||||
/* A3: ESPI IO 3 */
|
||||
/* A4: ESPI CS 0 */
|
||||
/* A5: Not Connected */
|
||||
PAD_NC(GPP_A5, NONE),
|
||||
/* A6: Not Connected */
|
||||
PAD_NC(GPP_A6, NONE),
|
||||
/* A7: Embedded Controller SCI */
|
||||
PAD_NC(GPP_A7, NONE),
|
||||
/* A8: Not Connected */
|
||||
PAD_NC(GPP_A8, NONE),
|
||||
/* A9: ESPI Clock */
|
||||
/* A10: ESPI Reset */
|
||||
/* A11: Not Connected */
|
||||
PAD_NC(GPP_A11, NONE),
|
||||
/* A12: PCH M.2 SSD PEDET */
|
||||
PAD_CFG_NF(GPP_A12, NONE, DEEP, NF1),
|
||||
/* A13: BlueTooth RF Kill */
|
||||
PAD_CFG_GPO_GPIO_DRIVER(GPP_A13, 1, DEEP, NONE),
|
||||
/* A14: Test Point 45 */
|
||||
PAD_NC(GPP_A14, NONE),
|
||||
/* A15: Test Point 52 */
|
||||
PAD_NC(GPP_A15, NONE),
|
||||
/* A16: USB OverCurrent 3 */
|
||||
PAD_CFG_NF(GPP_A16, NONE, DEEP, NF1),
|
||||
/* A17: Not Connected */
|
||||
PAD_NC(GPP_A17, NONE),
|
||||
/* A18: DDI B DP HPD */
|
||||
PAD_CFG_NF(GPP_A18, NONE, DEEP, NF1),
|
||||
/* A19: TCP0 HPD */
|
||||
PAD_CFG_NF(GPP_A19, NONE, PLTRST, NF1),
|
||||
/* A20: Test Point 44 */
|
||||
PAD_NC(GPP_A20, NONE),
|
||||
/* A21: Fingerprint Reader Interrupt */
|
||||
PAD_NC(GPP_A21, NONE),
|
||||
/* A22: Fingerprint Reader Reset */
|
||||
PAD_NC(GPP_A22, NONE),
|
||||
/* A23: Not Connected */
|
||||
PAD_NC(GPP_A23, NONE),
|
||||
|
||||
/* B0: Core Vendor ID 0 */
|
||||
PAD_CFG_NF(GPP_B0, NONE, DEEP, NF1),
|
||||
/* B1: Core Vendor ID 1 */
|
||||
PAD_CFG_NF(GPP_B1, NONE, DEEP, NF1),
|
||||
/* B2: BC PROCHOT */
|
||||
PAD_CFG_GPI_SCI(GPP_B2, NONE, PLTRST, EDGE_SINGLE, INVERT),
|
||||
/* B3: Not Connected */
|
||||
PAD_NC(GPP_B3, NONE),
|
||||
/* B4: Not Connected */
|
||||
PAD_NC(GPP_B4, NONE),
|
||||
/* B5: I2C 2 SDA Touch Panel SDA */
|
||||
PAD_NC(GPP_B5, NONE),
|
||||
/* B6: I2C 2 SCL Touch Panel Clock */
|
||||
PAD_NC(GPP_B6, NONE),
|
||||
/* B7: I2C 3 SDA Test Point 15 */
|
||||
PAD_CFG_NF(GPP_B7, NONE, DEEP, NF2),
|
||||
/* B8: I2C 3 SCL Test Point 16 */
|
||||
PAD_CFG_NF(GPP_B8, NONE, DEEP, NF2),
|
||||
/* B9: Not Connected */
|
||||
PAD_NC(GPP_B9, NONE),
|
||||
/* B10: Not Connected */
|
||||
PAD_NC(GPP_B10, NONE),
|
||||
/* B11: Not Connected */
|
||||
PAD_NC(GPP_B11, NONE),
|
||||
/* B12: PM SLP S0 */
|
||||
PAD_CFG_NF(GPP_B12, NONE, DEEP, NF1),
|
||||
/* B13: PLT RST */
|
||||
PAD_CFG_NF(GPP_B13, NONE, DEEP, NF1),
|
||||
/* B14: Top Swap Override Weak Internal PD 20K
|
||||
High: Enabled
|
||||
Low: Disabled */
|
||||
PAD_CFG_GPO(GPP_B14, 0, PLTRST),
|
||||
/* B15: Not Connected */
|
||||
PAD_NC(GPP_B15, NONE),
|
||||
/* B16: Not Connected */
|
||||
PAD_NC(GPP_B16, NONE),
|
||||
/* B17: Not Connected */
|
||||
PAD_NC(GPP_B17, NONE),
|
||||
/* B18: Reboot Support Weak Internal PD 20K
|
||||
High: Disabled
|
||||
Low: Enabled */
|
||||
PAD_NC(GPP_B18, NONE),
|
||||
/* B19: Not Connected */
|
||||
PAD_NC(GPP_B19, NONE),
|
||||
/* B20: Not Connected */
|
||||
PAD_NC(GPP_B20, NONE),
|
||||
/* B21: Not Connected */
|
||||
PAD_NC(GPP_B21, NONE),
|
||||
/* B22: Not Connected */
|
||||
PAD_NC(GPP_B22, NONE),
|
||||
/* B23: Not used MiPi Camera */
|
||||
PAD_NC(GPP_B23, NONE),
|
||||
/* B24: Not Connected */
|
||||
PAD_NC(GPP_B24, NONE),
|
||||
/* B25: Not Connected */
|
||||
PAD_NC(GPP_B25, NONE),
|
||||
|
||||
/* C0: SMB Clock */
|
||||
PAD_CFG_NF(GPP_C0, NONE, DEEP, NF1),
|
||||
/* C1: SMB Data */
|
||||
PAD_CFG_NF(GPP_C1, NONE, DEEP, NF1),
|
||||
/* C2: TLS Confidentiality Weak Internal PD 20K
|
||||
Low: Disabled
|
||||
High: Enabled */
|
||||
PAD_CFG_GPO(GPP_C2, 1, PLTRST),
|
||||
/* C3: SML 0 Clock */
|
||||
PAD_CFG_NF(GPP_C3, NONE, DEEP, NF1),
|
||||
/* C4: SML 0 Data */
|
||||
PAD_CFG_NF(GPP_C4, NONE, DEEP, NF1),
|
||||
/* C5: Boot Strap Weak Internal PD 20K
|
||||
Low: ESPI
|
||||
High: Disabled */
|
||||
PAD_CFG_GPO(GPP_C5, 0, DEEP),
|
||||
/* C6: SML 1 Clock */
|
||||
PAD_CFG_NF(GPP_C6, NONE, DEEP, NF1),
|
||||
/* C7: SML 1 Data */
|
||||
PAD_CFG_NF(GPP_C7, NONE, DEEP, NF1),
|
||||
/* C8: Not Connected */
|
||||
PAD_NC(GPP_C8, NONE),
|
||||
/* C9: Not Connected */
|
||||
PAD_NC(GPP_C9, NONE),
|
||||
/* C10: Not Connected */
|
||||
PAD_NC(GPP_C10, NONE),
|
||||
/* C11: Not Connected */
|
||||
PAD_NC(GPP_C11, NONE),
|
||||
/* C12: Not Connected */
|
||||
PAD_NC(GPP_C12, NONE),
|
||||
/* C13: Not Connected */
|
||||
PAD_NC(GPP_C13, NONE),
|
||||
/* C14: Not Connected */
|
||||
PAD_NC(GPP_C14, NONE),
|
||||
/* C15: Not Connected */
|
||||
PAD_NC(GPP_C15, NONE),
|
||||
/* C16: Not Connected */
|
||||
PAD_NC(GPP_C16, NONE),
|
||||
/* C17: Not Connected */
|
||||
PAD_NC(GPP_C17, NONE),
|
||||
/* C18: Not Connected */
|
||||
PAD_NC(GPP_C18, NONE),
|
||||
/* C19: Not Connected */
|
||||
PAD_NC(GPP_C19, NONE),
|
||||
/* C20: Not Connected */
|
||||
PAD_NC(GPP_C20, NONE),
|
||||
/* C21: Not Connected */
|
||||
PAD_NC(GPP_C21, NONE),
|
||||
/* C22: Not Connected */
|
||||
PAD_NC(GPP_C22, NONE),
|
||||
/* C23: Not Connected */
|
||||
PAD_NC(GPP_C23, NONE),
|
||||
|
||||
/* D0: Not used Audio ID 0 */
|
||||
PAD_NC(GPP_D0, NONE),
|
||||
/* D1: Not used Audio ID 1 */
|
||||
PAD_NC(GPP_D1, NONE),
|
||||
/* D2: Not used Audio ID 2 */
|
||||
PAD_NC(GPP_D2, NONE),
|
||||
/* D3: Not Connected */
|
||||
PAD_NC(GPP_D3, NONE),
|
||||
/* D4: Not Connected */
|
||||
PAD_NC(GPP_D4, NONE),
|
||||
/* D5: Clock Request 0 PCH M.2 SSD */
|
||||
PAD_CFG_NF(GPP_D5, NONE, DEEP, NF1),
|
||||
/* D6: Clock Request 1 Wireless LAN */
|
||||
PAD_CFG_NF(GPP_D6, NONE, DEEP, NF1),
|
||||
/* D7: Clock Request 2 */
|
||||
PAD_NC(GPP_D7, NONE),
|
||||
/* D8: Clock Request 3 */
|
||||
PAD_NC(GPP_D8, NONE),
|
||||
/* D9: GSPI 2 FPS */
|
||||
PAD_NC(GPP_D9, NONE),
|
||||
/* D10: GSPI 2 Clock */
|
||||
PAD_NC(GPP_D10, NONE),
|
||||
/* D11: GSPI 2 MISO FPS */
|
||||
PAD_NC(GPP_D11, NONE),
|
||||
/* D12: GSPI 2 MOSI FPS */
|
||||
PAD_NC(GPP_D12, NONE),
|
||||
/* D13: Wireless LAN Wake */
|
||||
PAD_CFG_GPO(GPP_D13, 1, PLTRST),
|
||||
/* D14: CPU M.2 SSD Power Enable */
|
||||
PAD_NC(GPP_D14, NONE),
|
||||
/* D15: Not Connected */
|
||||
PAD_NC(GPP_D15, NONE),
|
||||
/* D16: PCH M.2 SSD Power Enable */
|
||||
PAD_CFG_GPO(GPP_D16, 1, PLTRST),
|
||||
/* D17: Not used Fingerprint ID */
|
||||
PAD_NC(GPP_D17, NONE),
|
||||
/* D18: Not Connected */
|
||||
PAD_NC(GPP_D18, NONE),
|
||||
/* D19: Test Point 21 */
|
||||
PAD_NC(GPP_D19, NONE),
|
||||
|
||||
/* E0: SATA x PCIe */
|
||||
PAD_NC(GPP_E0, NONE),
|
||||
/* E1: Not used Accelerometer Interrupt */
|
||||
PAD_NC(GPP_E1, NONE),
|
||||
/* E2: Not Connected */
|
||||
PAD_CFG_GPO(GPP_E2, 1, PLTRST),
|
||||
/* E3: WiFi RF Kill */
|
||||
PAD_CFG_GPO_GPIO_DRIVER(GPP_E3, 1, DEEP, NONE),
|
||||
/* E4: Test Point 14 */
|
||||
PAD_NC(GPP_E4, NONE),
|
||||
/* E5: Not Connected */
|
||||
PAD_NC(GPP_E5, NONE),
|
||||
/* E6: JTAG ODT No internal PD
|
||||
Low: Disabled
|
||||
High: Enabled */
|
||||
PAD_CFG_GPO(GPP_E6, 0, DEEP),
|
||||
/* E7: Embedded Controller SMI */
|
||||
PAD_NC(GPP_E7, NONE),
|
||||
/* E8: DRAM Sleep */
|
||||
PAD_CFG_NF(GPP_E8, NONE, DEEP, NF1),
|
||||
/* E9: USB OverCurrent 0 */
|
||||
PAD_CFG_NF(GPP_E9, NONE, DEEP, NF1),
|
||||
/* E10: PWD Amplifier Input */
|
||||
PAD_CFG_GPO(GPP_E10, 0, PLTRST),
|
||||
/* E11: TPM IRQ */
|
||||
PAD_CFG_NF(GPP_E11, NONE, DEEP, NF1),
|
||||
/* E12: Touchpad Interrupt */
|
||||
PAD_CFG_GPI_APIC_LOW(GPP_E12, NONE, PLTRST),
|
||||
/* E13: Not connected */
|
||||
PAD_NC(GPP_E13, NONE),
|
||||
/* E14: EDP HPD */
|
||||
PAD_CFG_NF(GPP_E14, NONE, DEEP, NF1),
|
||||
/* E15: Not Connected */
|
||||
PAD_NC(GPP_E15, NONE),
|
||||
/* E16: Not Connected */
|
||||
PAD_NC(GPP_E16, NONE),
|
||||
/* E17: Not Connected */
|
||||
PAD_CFG_GPO(GPP_E17, 1, PLTRST),
|
||||
/* E18: Not Connected */
|
||||
PAD_NC(GPP_E18, NONE),
|
||||
/* E19: Thunderbolt LSX RXD */
|
||||
PAD_NC(GPP_E19, NONE),
|
||||
/* E20: Not Connected */
|
||||
PAD_NC(GPP_E20, NONE),
|
||||
/* E21: Not Connected */
|
||||
PAD_NC(GPP_E21, NONE),
|
||||
/* E22: Not Connected */
|
||||
PAD_NC(GPP_E22, NONE),
|
||||
/* E23: Not Connected */
|
||||
PAD_NC(GPP_E23, NONE),
|
||||
|
||||
/* F0: CNV BRI Data */
|
||||
PAD_NC(GPP_F0, NONE),
|
||||
/* F1: CNV BRI Response */
|
||||
PAD_NC(GPP_F1, NONE),
|
||||
/* F2: CNV RGI Data */
|
||||
PAD_NC(GPP_F2, NONE),
|
||||
/* F3: CNV RGI Response */
|
||||
PAD_NC(GPP_F3, NONE),
|
||||
/* F4: CNV RF Reset */
|
||||
PAD_NC(GPP_F4, NONE),
|
||||
/* F5: Not used MODEM_CLKREQ */
|
||||
PAD_NC(GPP_F5, NONE),
|
||||
/* F6: CNV PA Blanking */
|
||||
PAD_NC(GPP_F6, NONE),
|
||||
/* F7: TBT LSX VCCIO Weak Internal PD 20K
|
||||
Low: 1.8V
|
||||
High: 3.3V */
|
||||
PAD_NC(GPP_F7, NONE),
|
||||
/* F8: Not Connected */
|
||||
PAD_NC(GPP_F8, NONE),
|
||||
/* F9: EC Sleep S0 */
|
||||
PAD_CFG_GPO(GPP_F9, 1, PLTRST),
|
||||
/* F10: Weak Internal PD 20K */
|
||||
PAD_CFG_GPO(GPP_F10, 1, PLTRST),
|
||||
/* F11: TPM ID */
|
||||
PAD_NC(GPP_F11, NONE),
|
||||
/* F12: Not Connected */
|
||||
PAD_NC(GPP_F12, NONE),
|
||||
/* F13: Not Connected */
|
||||
PAD_NC(GPP_F13, NONE),
|
||||
/* F14: Not Connected */
|
||||
PAD_NC(GPP_F14, NONE),
|
||||
/* F15: Not used Accelerometer Interrupt 2*/
|
||||
PAD_NC(GPP_F15, NONE),
|
||||
/* F16: Not Connected */
|
||||
PAD_NC(GPP_F16, NONE),
|
||||
/* F17: Not used Touch Panel Reset */
|
||||
PAD_NC(GPP_F17, NONE),
|
||||
/* F18: Not used Touch Panel Interrupt */
|
||||
PAD_NC(GPP_F18, NONE),
|
||||
/* F19: Not Connected */
|
||||
PAD_NC(GPP_F19, NONE),
|
||||
/* F20: CPU M.2 SSD Reset */
|
||||
PAD_NC(GPP_F20, NONE),
|
||||
/* F21: GPPC_F21 */
|
||||
PAD_CFG_NF(GPP_F21, NONE, DEEP, NF1),
|
||||
/* F22: Not Connected */
|
||||
PAD_NC(GPP_F22, NONE),
|
||||
/* F23: Not Connected */
|
||||
PAD_NC(GPP_F23, NONE),
|
||||
|
||||
/* H0: PCH M.2 SSD Reset */
|
||||
PAD_CFG_GPO(GPP_H0, 1, PLTRST),
|
||||
/* H1: BFX Strap 2 Bit 3 Weak Internal PD 20K */
|
||||
PAD_CFG_GPO(GPP_H1, 1, PLTRST),
|
||||
/* H2: Wireless LAN Reset */
|
||||
PAD_CFG_GPO(GPP_H2, 1, PLTRST),
|
||||
/* H3: Not Connected */
|
||||
PAD_NC(GPP_H3, NONE),
|
||||
/* H4: I2C 0 SDA Touchpad */
|
||||
PAD_NC(GPP_H4, NONE),
|
||||
/* H5: I2C 0 SDL Touchpad */
|
||||
PAD_NC(GPP_H5, NONE),
|
||||
/* H6: Not Connected */
|
||||
PAD_NC(GPP_H6, NONE),
|
||||
/* H7: Not Connected */
|
||||
PAD_NC(GPP_H7, NONE),
|
||||
/* H8: I2C 4 SDA GSensor */
|
||||
PAD_NC(GPP_H8, NONE),
|
||||
/* H9: I2C 4 SDL GSensor */
|
||||
PAD_NC(GPP_H9, NONE),
|
||||
/* H12: Not Connected */
|
||||
PAD_NC(GPP_H12, NONE),
|
||||
/* H13: PCH M.2 SSD Device Sleep */
|
||||
PAD_CFG_GPO(GPP_H13, 0, PLTRST),
|
||||
/* H14: Not Connected */
|
||||
PAD_NC(GPP_H14, NONE),
|
||||
/* H15: DDPB Control Clock */
|
||||
PAD_CFG_NF(GPP_H15, NONE, DEEP, NF1),
|
||||
/* H16: Not Connected */
|
||||
PAD_NC(GPP_H16, NONE),
|
||||
/* H17: DDPB Control Data */
|
||||
PAD_CFG_NF(GPP_H17, NONE, DEEP, NF1),
|
||||
/* H18: CPI C10 Gate */
|
||||
PAD_CFG_NF(GPP_H18, NONE, DEEP, NF1),
|
||||
/* H19: Clock Request 4 CPU M.2 SSD */
|
||||
PAD_NC(GPP_H19, NONE),
|
||||
/* H20: Not Connected */
|
||||
PAD_NC(GPP_H20, NONE),
|
||||
/* H21: Not Connected */
|
||||
PAD_NC(GPP_H21, NONE),
|
||||
/* H22: Not Connected */
|
||||
PAD_NC(GPP_H22, NONE),
|
||||
/* H23: Clock Request 5 */
|
||||
PAD_NC(GPP_H23, NONE),
|
||||
|
||||
/* S0: Not Connected */
|
||||
PAD_NC(GPP_S0, NONE),
|
||||
/* S1: Not Connected */
|
||||
PAD_NC(GPP_S1, NONE),
|
||||
/* S2: DMIC Clock */
|
||||
PAD_CFG_NF(GPP_S2, NONE, DEEP, NF2),
|
||||
/* S3: DMIC Data */
|
||||
PAD_CFG_NF(GPP_S3, NONE, DEEP, NF2),
|
||||
/* S4: Not Connected */
|
||||
PAD_NC(GPP_S4, NONE),
|
||||
/* S5: Not Connected */
|
||||
PAD_NC(GPP_S5, NONE),
|
||||
/* S6: Not Connected */
|
||||
PAD_NC(GPP_S6, NONE),
|
||||
/* S7: Not Connected */
|
||||
PAD_NC(GPP_S7, NONE),
|
||||
|
||||
/* T0: Not Connected */
|
||||
PAD_NC(GPP_T0, NONE),
|
||||
/* T1: Not Connected */
|
||||
PAD_NC(GPP_T1, NONE),
|
||||
/* T2: Not Connected */
|
||||
PAD_NC(GPP_T2, NONE),
|
||||
/* T3: Not Connected */
|
||||
PAD_NC(GPP_T3, NONE),
|
||||
/* T4: Not Connected */
|
||||
PAD_NC(GPP_T4, NONE),
|
||||
/* T5: Not Connected */
|
||||
PAD_NC(GPP_T5, NONE),
|
||||
/* T6: Not Connected */
|
||||
PAD_NC(GPP_T6, NONE),
|
||||
/* T7: Not Connected */
|
||||
PAD_NC(GPP_T7, NONE),
|
||||
/* T8: Not Connected */
|
||||
PAD_NC(GPP_T8, NONE),
|
||||
/* T9: Not Connected */
|
||||
PAD_NC(GPP_T9, NONE),
|
||||
/* T10: Not Connected */
|
||||
PAD_NC(GPP_T10, NONE),
|
||||
/* T11: Not Connected */
|
||||
PAD_NC(GPP_T11, NONE),
|
||||
/* T12: Not Connected */
|
||||
PAD_NC(GPP_T12, NONE),
|
||||
/* T13: Not Connected */
|
||||
PAD_NC(GPP_T13, NONE),
|
||||
/* T14: Not Connected */
|
||||
PAD_NC(GPP_T14, NONE),
|
||||
/* T15: Not Connected */
|
||||
PAD_NC(GPP_T15, NONE),
|
||||
|
||||
/* R0: HDA BCLK */
|
||||
PAD_CFG_NF(GPP_R0, NATIVE, DEEP, NF1),
|
||||
/* R1: HDA SYNC */
|
||||
PAD_CFG_NF(GPP_R1, NATIVE, DEEP, NF1),
|
||||
/* R2: HDA SDO */
|
||||
PAD_CFG_NF(GPP_R2, NATIVE, DEEP, NF1),
|
||||
/* R3: HDA SDI */
|
||||
PAD_CFG_NF(GPP_R3, NATIVE, DEEP, NF1),
|
||||
/* R4: HDA Reset */
|
||||
PAD_CFG_NF(GPP_R4, NATIVE, DEEP, NF1),
|
||||
/* R5: MiPi Cam Reset */
|
||||
PAD_NC(GPP_R5, NONE),
|
||||
/* R6: Not Connected */
|
||||
PAD_NC(GPP_R6, NONE),
|
||||
/* R7: Not Connected */
|
||||
PAD_NC(GPP_R7, NONE),
|
||||
};
|
||||
|
||||
const struct pad_config *variant_gpio_table(size_t *num)
|
||||
{
|
||||
*num = ARRAY_SIZE(gpio_table);
|
||||
return gpio_table;
|
||||
}
|
||||
121
src/mainboard/starlabs/starbook/variants/adl_n/hda_verb.c
Normal file
121
src/mainboard/starlabs/starbook/variants/adl_n/hda_verb.c
Normal file
|
|
@ -0,0 +1,121 @@
|
|||
/* SPDX-License-Identifier: GPL-2.0-only */
|
||||
|
||||
#include <device/azalia_device.h>
|
||||
#include <stdint.h>
|
||||
|
||||
#define DMIC 0x12
|
||||
#define SPEAKERS 0x14
|
||||
#define HEADPHONE 0x15
|
||||
#define MONO 0x17
|
||||
#define MIC1 0x18
|
||||
#define MIC2 0x19
|
||||
#define LINE1 0x1a
|
||||
#define LINE2 0x1b
|
||||
#define PC_BEEP 0x1d
|
||||
#define S_PDIF 0x1e
|
||||
|
||||
const u32 cim_verb_data[] = {
|
||||
/* coreboot specific header */
|
||||
0x10ec0269, /* Codec Vendor / Device ID: Realtek ALC269 */
|
||||
0x1e507038, /* Subsystem ID */
|
||||
18, /* Number of verb entries */
|
||||
|
||||
/* Reset Codec First */
|
||||
AZALIA_RESET(0x1),
|
||||
|
||||
/* HDA Codec Subsystem ID */
|
||||
AZALIA_SUBVENDOR(0, 0x1e507038),
|
||||
|
||||
AZALIA_PIN_CFG(0, 0x01, 0x00000000),
|
||||
AZALIA_PIN_CFG(0, DMIC, AZALIA_PIN_DESC( \
|
||||
AZALIA_INTEGRATED, \
|
||||
AZALIA_INTERNAL | AZALIA_TOP, \
|
||||
AZALIA_MIC_IN, \
|
||||
AZALIA_TYPE_UNKNOWN, \
|
||||
AZALIA_BLACK, \
|
||||
AZALIA_JACK_PRESENCE_DETECT, \
|
||||
3, \
|
||||
0 \
|
||||
)),
|
||||
|
||||
AZALIA_PIN_CFG(0, SPEAKERS, AZALIA_PIN_DESC( \
|
||||
AZALIA_INTEGRATED, \
|
||||
AZALIA_INTERNAL | AZALIA_FRONT, \
|
||||
AZALIA_SPEAKER, \
|
||||
AZALIA_TYPE_UNKNOWN, \
|
||||
AZALIA_BLACK, \
|
||||
AZALIA_JACK_PRESENCE_DETECT, \
|
||||
1, \
|
||||
0 \
|
||||
)),
|
||||
AZALIA_PIN_CFG(0, HEADPHONE, AZALIA_PIN_DESC( \
|
||||
AZALIA_JACK, \
|
||||
AZALIA_EXTERNAL_PRIMARY_CHASSIS | AZALIA_RIGHT, \
|
||||
AZALIA_HP_OUT, \
|
||||
AZALIA_STEREO_MONO_1_8, \
|
||||
AZALIA_BLACK, \
|
||||
AZALIA_JACK_PRESENCE_DETECT, \
|
||||
2, \
|
||||
0 \
|
||||
)),
|
||||
AZALIA_PIN_CFG(0, MONO, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, MIC1, AZALIA_PIN_DESC( \
|
||||
AZALIA_JACK, \
|
||||
AZALIA_EXTERNAL_PRIMARY_CHASSIS | AZALIA_RIGHT, \
|
||||
AZALIA_MIC_IN, \
|
||||
AZALIA_STEREO_MONO_1_8, \
|
||||
AZALIA_BLACK, \
|
||||
AZALIA_JACK_PRESENCE_DETECT, \
|
||||
4, \
|
||||
0 \
|
||||
)),
|
||||
AZALIA_PIN_CFG(0, MIC2, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, LINE1, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, LINE2, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, PC_BEEP, AZALIA_PIN_CFG_NC(0)),
|
||||
AZALIA_PIN_CFG(0, S_PDIF, AZALIA_PIN_CFG_NC(0)),
|
||||
|
||||
0x02050018,
|
||||
0x02040184,
|
||||
|
||||
0x0205001C,
|
||||
0x02044b00,
|
||||
|
||||
0x02050024,
|
||||
0x02040000,
|
||||
|
||||
0x02050004,
|
||||
0x02040080,
|
||||
|
||||
0x02050008,
|
||||
0x02040000,
|
||||
|
||||
0x0205000C,
|
||||
0x02043F00,
|
||||
|
||||
0x02050015,
|
||||
0x02048002,
|
||||
|
||||
0x02050015,
|
||||
0x02048002,
|
||||
|
||||
0x00C37080,
|
||||
0x00270610,
|
||||
0x00D37080,
|
||||
0x00370610,
|
||||
|
||||
0x8086280d, /* Codec Vendor / Device ID: Intel */
|
||||
0x80860101, /* Subsystem ID */
|
||||
4, /* Number of 4 dword sets */
|
||||
|
||||
AZALIA_SUBVENDOR(2, 0x80860101),
|
||||
|
||||
AZALIA_PIN_CFG(2, 0x05, 0x18560010),
|
||||
AZALIA_PIN_CFG(2, 0x06, 0x18560020),
|
||||
AZALIA_PIN_CFG(2, 0x07, 0x18560030),
|
||||
};
|
||||
|
||||
const u32 pc_beep_verbs[] = {
|
||||
};
|
||||
|
||||
AZALIA_ARRAY_SIZES;
|
||||
13
src/mainboard/starlabs/starbook/variants/adl_n/ramstage.c
Normal file
13
src/mainboard/starlabs/starbook/variants/adl_n/ramstage.c
Normal file
|
|
@ -0,0 +1,13 @@
|
|||
/* SPDX-License-Identifier: GPL-2.0-only */
|
||||
|
||||
#include <soc/ramstage.h>
|
||||
|
||||
void mainboard_silicon_init_params(FSP_S_CONFIG *supd)
|
||||
{
|
||||
/*
|
||||
* FSP defaults to pins that are used for LPC; given that
|
||||
* coreboot only supports eSPI, set these pins accordingly.
|
||||
*/
|
||||
supd->PchSerialIoI2cSdaPinMux[0] = 0x1947c404; // GPP_H4
|
||||
supd->PchSerialIoI2cSclPinMux[0] = 0x1947a405; // GPP_H5
|
||||
}
|
||||
33
src/mainboard/starlabs/starbook/variants/adl_n/romstage.c
Normal file
33
src/mainboard/starlabs/starbook/variants/adl_n/romstage.c
Normal file
|
|
@ -0,0 +1,33 @@
|
|||
/* SPDX-License-Identifier: GPL-2.0-only */
|
||||
|
||||
#include <option.h>
|
||||
#include <soc/meminit.h>
|
||||
#include <soc/romstage.h>
|
||||
#include <types.h>
|
||||
|
||||
void mainboard_memory_init_params(FSPM_UPD *mupd)
|
||||
{
|
||||
const struct mb_cfg mem_config = {
|
||||
.type = MEM_TYPE_DDR4,
|
||||
};
|
||||
|
||||
const bool half_populated = true;
|
||||
|
||||
const struct mem_spd ddr4_spd_info = {
|
||||
.topo = MEM_TOPO_DIMM_MODULE,
|
||||
.smbus = {
|
||||
[0] = {
|
||||
.addr_dimm[0] = 0x50,
|
||||
}
|
||||
},
|
||||
};
|
||||
|
||||
memcfg_init(mupd, &mem_config, &ddr4_spd_info, half_populated);
|
||||
|
||||
const uint8_t vtd = get_uint_option("vtd", 1);
|
||||
mupd->FspmConfig.VtdDisable = !vtd;
|
||||
|
||||
/* Enable/Disable Wireless (RP07) based on CMOS settings */
|
||||
if (get_uint_option("wireless", 1) == 0)
|
||||
mupd->FspmConfig.PcieRpEnableMask &= ~(1 << 6);
|
||||
};
|
||||
24
src/mainboard/starlabs/starbook/variants/adl_n/vboot.fmd
Normal file
24
src/mainboard/starlabs/starbook/variants/adl_n/vboot.fmd
Normal file
|
|
@ -0,0 +1,24 @@
|
|||
FLASH 0x2000000 {
|
||||
SI_ALL 0x1000000 {
|
||||
SI_DESC 0x1000
|
||||
SI_ME
|
||||
}
|
||||
SI_BIOS@0x1000000 0x32b000 {
|
||||
EC@0x0 0x20000
|
||||
RO_SECTION@0x20000 0x253000 {
|
||||
FMAP@0x0 0x1000
|
||||
COREBOOT(CBFS)@0x1000 0x210000
|
||||
GBB@0x211000 0x40000
|
||||
RO_FRID@0x251000 0x40
|
||||
RO_VPD(PRESERVE)@0x252000 0x1000
|
||||
}
|
||||
MISC_RW@0x253000 0x10000 {
|
||||
RW_MRC_CACHE@0x0 0x10000
|
||||
}
|
||||
SMMSTORE@0x263000 0x40000
|
||||
CONSOLE@0x0x2a3000 0x20000
|
||||
RW_NVRAM(PRESERVE)@0x2c3000 0x6000
|
||||
RW_VPD(PRESERVE)@0x2c9000 0x2000
|
||||
RW_LEGACY(CBFS)@0x32b000 0x60000
|
||||
}
|
||||
}
|
||||
Loading…
Add table
Add a link
Reference in a new issue