erebion/coreboot
1
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity Actions

Docs/mb/starlabs/labtop_cml.md: Fix footnote syntax

Browse source 
Fix the syntax [1] for the footnote about the onboard memory
configuration so that it renders properly in the generated html.
This also fixes a "Unknown target name" error when building with
newer versions of Sphinx (tested with 8.1.3).

[1] https://myst-parser.readthedocs.io/en/latest/syntax/typography.html#footnotes

Change-Id: I07a85b854a181794f82d8e6a739063d66378d2c7
Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/85412
Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Elyes Haouas <ehaouas@noos.fr>
This commit is contained in:
Nicholas Chin 2024-11-27 19:00:01 -07:00 • committed by Elyes Haouas
commit 7f54139a81
1 changed files with 2 additions and 2 deletions
Download patch file Download diff file Expand all files Collapse all files

4
Documentation/mainboard/starlabs/labtop_cml.md
View file

@ -18,7 +18,7 @@
- HDMI video
- USB-C DisplayPort video
- Memory
- 16GB on-board *1
- 16GB on-board [^1]
- Networking
- AX201 CNVi WiFi / Bluetooth soldered to PCBA
- Sound
@ -37,7 +37,7 @@
- USB 3.1 Gen 2 Type-A (left)
- USB 3.1 Gen 1 Type-A (right)
[^1] The Comet Lake PCB supports multiple memory variations that are based on hardware configuration resistors see `src/mainboard/starlabs/labtop/variants/cml/romstage.c`
[^1]: The Comet Lake PCB supports multiple memory variations that are based on hardware configuration resistors see `src/mainboard/starlabs/labtop/variants/cml/romstage.c`
## Building coreboot