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util/intelp2m/platforms: Add support for Elkhart Lake

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TEST:
- 'make test' = PASS;
- 'intelp2m -p ehl -file parser/testlog/inteltool_test.log' = no errors.

Change-Id: I0f60d182bc5cc3d0d1d1177fbda0cfe8e2279e46
Signed-off-by: Alexander Couzens <lynxis@fe80.eu>
Signed-off-by: Maxim Polyakov <max.senia.poliak@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/84191
Reviewed-by: David Hendricks <david.hendricks@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Alexander Couzens 2023-12-01 15:43:28 +00:00 • committed by Felix Singer
commit 6789dea1d6
7 changed files with 166 additions and 2 deletions
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1
Documentation/util/intelp2m/index.md
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@ -73,6 +73,7 @@ The utility supports the following chipsets from Intel:
* `apl` - Apollo Lake SoC
* `cnl` - CannonLake-LP or Whiskeylake/Coffeelake/Cometlake-U SoC
* `ebg` - Emmitsburg PCH with Xeon SP
* `ehl` - Elkhart Lake SoC
* `jsl` - Jasper Lake SoC
* `lbg` - Lewisburg PCH with Xeon SP
* `mtl` - MeteorLake SoC

3
util/intelp2m/cli/options.go
View file

@ -12,11 +12,12 @@ import (
var name = filepath.Base(os.Args[0])
const usagePlatform = `usage: -platform <type>
type: adl | apl | cnl | ebg | jsl | lbg | mtl | snr | tgl | ?
type: adl | apl | cnl | ebg | ehl | jsl | lbg | mtl | snr | tgl | ?
adl - Alder Lake PCH
apl - Apollo Lake SoC
cnl - CannonLake-LP or Whiskeylake/Coffeelake/Cometlake-U SoC
ebg - Emmitsburg PCH with Xeon SP
ehl - Elkhart Lake SoC
jsl - Jasper Lake SoC
lbg - Lewisburg PCH with Xeon SP
mtl - MeteorLake SoC

2
util/intelp2m/config/p2m/config.go
View file

@ -17,6 +17,7 @@ const (
Tiger
Meteor
Emmitsburg
Elkhart
)
const (
@ -36,6 +37,7 @@ var platforms = map[string]PlatformType{
"jsl": Jasper,
"mtl": Meteor,
"ebg": Emmitsburg,
"ehl": Elkhart,
}
var fields = map[string]FieldType{

54
util/intelp2m/platforms/ehl/ehl.go Normal file
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@ -0,0 +1,54 @@
package ehl
import (
"review.coreboot.org/coreboot.git/util/intelp2m/logs"
"review.coreboot.org/coreboot.git/util/intelp2m/platforms/apl"
"review.coreboot.org/coreboot.git/util/intelp2m/platforms/common"
)
const (
DW0Mask = (0b1 << 27) | (0b1111 << 14) | 0b11111100
DW1Mask = 0b11111111111111000000000011111111
)
var GPPGroups = []string{"GPP_", "GPD_", "GPIO_", "VGPIO_"}
type BasePlatform struct {
// based on the Apollo Lake SoC
apl.BasePlatform
}
func InitBasePlatform(dw0Val, dw0Mask uint32, dw1Val, dw1Mask uint32) BasePlatform {
return BasePlatform{apl.InitBasePlatform(dw0Val, dw0Mask, dw1Val, dw1Mask)}
}
func GetPlatform(dw0, dw1 uint32) common.PlatformIf {
p := InitBasePlatform(dw0, DW0Mask, dw1, DW1Mask)
return &p
}
// Override BasePlatform.Pull()
func (p *BasePlatform) Pull(m *common.Macro) {
dw1 := p.GetRegisterDW1()
var pull = map[uint32]string{
0b0000: "NONE",
0b0001: "DN_1K",
0b0010: "DN_5K",
0b0100: "DN_20K",
0b1000: "UP_1K_5K_20K",
0b1001: "UP_1K",
0b1010: "UP_5K",
0b1011: "UP_1K_5K",
0b1100: "UP_20K",
0b1101: "UP_1K_20K",
0b1110: "UP_5K_20K",
0b1111: "NATIVE",
}
term, valid := pull[dw1.GetTermination()]
if !valid {
term = "ERROR"
logs.Errorf("%s: DW1 %s: invalid termination value 0b%b",
dw1, m.GetPadId(), dw1.GetTermination())
}
m.Separator().Add(term)
}

103
util/intelp2m/platforms/ehl/ehl_test.go Normal file
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@ -0,0 +1,103 @@
package ehl_test
import (
"testing"
"review.coreboot.org/coreboot.git/util/intelp2m/config/p2m"
"review.coreboot.org/coreboot.git/util/intelp2m/platforms/common"
"review.coreboot.org/coreboot.git/util/intelp2m/platforms/test"
)
func TestGenMacro(t *testing.T) {
p2m.Config.Platform = p2m.Elkhart
test.Suite{
{
Pad: test.Pad{ID: "GPIO_1", DW0: 0x11111111, DW1: 0x11111111, Ownership: common.Driver},
Macro: test.Macro{
Short: "PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_1, DN_20K, PWROK, NF4, Tx1RxDCRx1, DISPUPD),",
Long: "_PAD_CFG_STRUCT(GPIO_1, PAD_FUNC(NF4) | PAD_IRQ_ROUTE(IOAPIC) | PAD_BUF(TX_DISABLE) | (1 << 28) | 1, PAD_PULL(DN_20K) | PAD_IOSSTATE(Tx1RxDCRx1) | PAD_IOSTERM(DISPUPD) | PAD_CFG_OWN_GPIO(DRIVER)),",
},
},
{
Pad: test.Pad{ID: "GPIO_2", DW0: 0x22222222, DW1: 0x22222222, Ownership: common.Acpi},
Macro: test.Macro{
Short: "PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_2, 0, PWROK, UP_1K_5K_20K, HIZCRx1, ENPD),",
Long: "_PAD_CFG_STRUCT(GPIO_2, PAD_FUNC(GPIO) | PAD_TRIG(EDGE_SINGLE) | PAD_IRQ_ROUTE(NMI) | PAD_BUF(RX_DISABLE) | (1 << 29) | (1 << 1), PAD_CFG1_TOL_1V8PAD_PULL(UP_1K_5K_20K) | PAD_IOSSTATE(HIZCRx1) | PAD_IOSTERM(ENPD)),",
},
},
{
Pad: test.Pad{ID: "GPIO_3", DW0: 0x44444444, DW1: 0x44444444, Ownership: common.Driver},
Macro: test.Macro{
Short: "PAD_CFG_NF_IOSSTATE(GPIO_3, DN_1K, DEEP, NF1, Tx0RxDCRx0),",
Long: "_PAD_CFG_STRUCT(GPIO_3, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_IRQ_ROUTE(SMI), PAD_PULL(DN_1K) | PAD_IOSSTATE(Tx0RxDCRx0) | PAD_CFG_OWN_GPIO(DRIVER)),",
},
},
{
Pad: test.Pad{ID: "GPIO_4", DW0: 0x88888888, DW1: 0x88888888, Ownership: common.Acpi},
Macro: test.Macro{
Short: "PAD_CFG_NF_IOSSTATE(GPIO_4, DN_5K, PLTRST, NF2, Tx0RxDCRx1),",
Long: "_PAD_CFG_STRUCT(GPIO_4, PAD_FUNC(NF2) | PAD_RESET(PLTRST) | PAD_IRQ_ROUTE(SCI) | PAD_RX_POL(INVERT), PAD_PULL(DN_5K) | PAD_IOSSTATE(Tx0RxDCRx1)),",
},
},
}.Run(t, "INTEL-ELKHART-LAKE-PCH/SLIDING-ONE-IN-NIBBLE-TEST")
test.Suite{
{
Pad: test.Pad{ID: "GPIO_5", DW0: 0xEEEEEEEE, DW1: 0xEEEEEEEE, Ownership: common.Driver},
Macro: test.Macro{
Short: "PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_5, UP_1K_5K, RSMRST, NF3, ERROR, ENPD),",
Long: "_PAD_CFG_STRUCT(GPIO_5, PAD_FUNC(NF3) | PAD_RESET(RSMRST) | PAD_TRIG(EDGE_BOTH) | PAD_IRQ_ROUTE(SCI) | PAD_IRQ_ROUTE(SMI) | PAD_IRQ_ROUTE(NMI) | PAD_RX_POL(INVERT) | PAD_BUF(RX_DISABLE) | (1 << 29) | (1 << 1), PAD_CFG1_TOL_1V8PAD_PULL(UP_1K_5K) | PAD_IOSSTATE(ERROR) | PAD_IOSTERM(ENPD) | PAD_CFG_OWN_GPIO(DRIVER)),",
},
},
{
Pad: test.Pad{ID: "GPIO_6", DW0: 0xDDDDDDDD, DW1: 0xDDDDDDDD, Ownership: common.Acpi},
Macro: test.Macro{
Short: "PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_6, ERROR, RSMRST, NF7, HIZCRx0, DISPUPD),",
Long: "_PAD_CFG_STRUCT(GPIO_6, PAD_FUNC(NF7) | PAD_RESET(RSMRST) | PAD_TRIG(OFF) | PAD_IRQ_ROUTE(IOAPIC) | PAD_IRQ_ROUTE(SCI) | PAD_IRQ_ROUTE(SMI) | PAD_RX_POL(INVERT) | PAD_BUF(TX_DISABLE) | (1 << 28) | 1, PAD_PULL(ERROR) | PAD_IOSSTATE(HIZCRx0) | PAD_IOSTERM(DISPUPD)),",
},
},
{
Pad: test.Pad{ID: "GPIO_7", DW0: 0xBBBBBBBB, DW1: 0xBBBBBBBB, Ownership: common.Driver},
Macro: test.Macro{
Short: "PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_7, UP_5K_20K, PLTRST, NF6, ERROR, ENPU),",
Long: "_PAD_CFG_STRUCT(GPIO_7, PAD_FUNC(NF6) | PAD_RESET(PLTRST) | PAD_TRIG(EDGE_SINGLE) | PAD_IRQ_ROUTE(IOAPIC) | PAD_IRQ_ROUTE(SCI) | PAD_IRQ_ROUTE(NMI) | PAD_RX_POL(INVERT) | PAD_BUF(TX_RX_DISABLE) | (1 << 29) | (1 << 28) | (1 << 1) | 1, PAD_CFG1_TOL_1V8PAD_PULL(UP_5K_20K) | PAD_IOSSTATE(ERROR) | PAD_IOSTERM(ENPU) | PAD_CFG_OWN_GPIO(DRIVER)),",
},
},
{
Pad: test.Pad{ID: "GPIO_8", DW0: 0x77777777, DW1: 0x77777777, Ownership: common.Acpi},
Macro: test.Macro{
Short: "PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_8, UP_1K_20K, DEEP, NF5, ERROR, ENPU),",
Long: "_PAD_CFG_STRUCT(GPIO_8, PAD_FUNC(NF5) | PAD_RESET(DEEP) | PAD_TRIG(EDGE_BOTH) | PAD_IRQ_ROUTE(IOAPIC) | PAD_IRQ_ROUTE(SMI) | PAD_IRQ_ROUTE(NMI) | PAD_BUF(TX_RX_DISABLE) | (1 << 29) | (1 << 28) | (1 << 1) | 1, PAD_CFG1_TOL_1V8PAD_PULL(UP_1K_20K) | PAD_IOSSTATE(ERROR) | PAD_IOSTERM(ENPU)),",
},
},
}.Run(t, "INTEL-ELKHART-LAKE-PCH/SLIDING-ZERO-IN-NIBBLE-TEST")
test.Suite{
{
Pad: test.Pad{ID: "GPIO_9", DW0: 0x33333333, DW1: 0x33333333, Ownership: common.Driver},
Macro: test.Macro{
Short: "PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_9, UP_20K, PWROK, NF4, ERROR, ENPU),",
Long: "_PAD_CFG_STRUCT(GPIO_9, PAD_FUNC(NF4) | PAD_TRIG(EDGE_SINGLE) | PAD_IRQ_ROUTE(IOAPIC) | PAD_IRQ_ROUTE(NMI) | PAD_BUF(TX_RX_DISABLE) | (1 << 29) | (1 << 28) | (1 << 1) | 1, PAD_CFG1_TOL_1V8PAD_PULL(UP_20K) | PAD_IOSSTATE(ERROR) | PAD_IOSTERM(ENPU) | PAD_CFG_OWN_GPIO(DRIVER)),",
},
},
{
Pad: test.Pad{ID: "GPIO_10", DW0: 0x66666666, DW1: 0x66666666, Ownership: common.Acpi},
Macro: test.Macro{
Short: "PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_10, UP_1K, DEEP, NF1, TxDRxE, ENPD),",
Long: "_PAD_CFG_STRUCT(GPIO_10, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(EDGE_BOTH) | PAD_IRQ_ROUTE(SMI) | PAD_IRQ_ROUTE(NMI) | PAD_BUF(RX_DISABLE) | (1 << 29) | (1 << 1), PAD_CFG1_TOL_1V8PAD_PULL(UP_1K) | PAD_IOSSTATE(TxDRxE) | PAD_IOSTERM(ENPD)),",
},
},
{
Pad: test.Pad{ID: "GPIO_11", DW0: 0xCCCCCCCC, DW1: 0xCCCCCCCC, Ownership: common.Driver},
Macro: test.Macro{
Short: "PAD_CFG_NF_IOSSTATE(GPIO_11, ERROR, RSMRST, NF3, Tx1RxDCRx0),",
Long: "_PAD_CFG_STRUCT(GPIO_11, PAD_FUNC(NF3) | PAD_RESET(RSMRST) | PAD_TRIG(OFF) | PAD_IRQ_ROUTE(SCI) | PAD_IRQ_ROUTE(SMI) | PAD_RX_POL(INVERT), PAD_PULL(ERROR) | PAD_IOSSTATE(Tx1RxDCRx0) | PAD_CFG_OWN_GPIO(DRIVER)),",
},
},
{
Pad: test.Pad{ID: "GPIO_12", DW0: 0x99999999, DW1: 0x99999999, Ownership: common.Acpi},
Macro: test.Macro{
Short: "PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_12, ERROR, PLTRST, NF6, Tx1RxE, DISPUPD),",
Long: "_PAD_CFG_STRUCT(GPIO_12, PAD_FUNC(NF6) | PAD_RESET(PLTRST) | PAD_IRQ_ROUTE(IOAPIC) | PAD_IRQ_ROUTE(SCI) | PAD_RX_POL(INVERT) | PAD_BUF(TX_DISABLE) | (1 << 28) | 1, PAD_PULL(ERROR) | PAD_IOSSTATE(Tx1RxE) | PAD_IOSTERM(DISPUPD)),",
},
},
}.Run(t, "INTEL-ELKHART-LAKE-PCH/SLIDING-ONE-ONE-IN-NIBBLE-TEST")
}

3
util/intelp2m/platforms/platforms.go
View file

@ -9,6 +9,7 @@ import (
"review.coreboot.org/coreboot.git/util/intelp2m/platforms/cnl"
"review.coreboot.org/coreboot.git/util/intelp2m/platforms/common"
"review.coreboot.org/coreboot.git/util/intelp2m/platforms/ebg"
"review.coreboot.org/coreboot.git/util/intelp2m/platforms/ehl"
"review.coreboot.org/coreboot.git/util/intelp2m/platforms/jsl"
"review.coreboot.org/coreboot.git/util/intelp2m/platforms/lbg"
"review.coreboot.org/coreboot.git/util/intelp2m/platforms/mtl"
@ -30,6 +31,7 @@ var platformConstructorMap = map[p2m.PlatformType]Constructor{
p2m.Meteor: mtl.GetPlatform,
p2m.Emmitsburg: ebg.GetPlatform,
p2m.Lewisburg: lbg.GetPlatform,
p2m.Elkhart: ehl.GetPlatform,
}
var GppMap = map[p2m.PlatformType][]string{
@ -42,6 +44,7 @@ var GppMap = map[p2m.PlatformType][]string{
p2m.Meteor: mtl.GPPGroups,
p2m.Emmitsburg: ebg.GPPGroups,
p2m.Lewisburg: lbg.GPPGroups,
p2m.Elkhart: ehl.GPPGroups,
}
func GetConstructor() (Constructor, error) {

2
util/intelp2m/version.txt
View file

@ -1 +1 @@
1.5
2.5