Commit graph

14,565 commits

Author SHA1 Message Date
Jeremy Compostella
c940d20696 soc/intel: Consolidate common code macro definitions in pci_devs.h
Move the SOC_I2C_DEVFN(n) macro definitions that were duplicated in a
separate "for common code" section at the end of multiple platform
pci_devs.h files.

Platforms affected:
- Alder Lake
- Cannon Lake
- Elkhart Lake
- Jasper Lake
- Skylake
- Tiger Lake

Change-Id: Ie3b3e6a25b0dba1beeadad1ab9acf59cafdbcf4a
Signed-off-by: Jeremy Compostella <jeremy.compostella@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/91446
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Guvendik, Bora <bora.guvendik@intel.com>
2026-03-01 17:03:40 +00:00
Jeremy Compostella
d03957e10f soc/intel/tigerlake: Use common PCH client SMI handler
Migrate Tiger Lake to use the common PCH client SMI handler
implementation from the Intel common feature code. This change
eliminates platform-specific code by leveraging the shared smihandler.c
driver.

This commit:
- Adds SOC_PMC_DEV macro definition to soc/pci_devs.h
- Selects SOC_INTEL_COMMON_FEATURE_SMIHANDLER Kconfig
- Removes src/soc/intel/tigerlake/smihandler.c
- Updates Makefile to remove smihandler.c compilation

Tiger Lake uses PCH_DEV_PMC as the PMC device identifier.

Change-Id: Ibe06e4d100b2715aeccfe0ff85dc944ab6cd80fc
Signed-off-by: Jeremy Compostella <jeremy.compostella@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/91297
Reviewed-by: Huang, Cliff <cliff.huang@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2026-03-01 17:03:29 +00:00
Jeremy Compostella
402da237bc soc/intel/pantherlake: Use common PCH client SMI handler
Migrate Panther Lake to use the common PCH client SMI handler
implementation from the Intel common feature code. This change
eliminates platform-specific code by leveraging the shared smihandler.c
driver.

This commit:
- Adds SOC_PMC_DEV macro definition to soc/pci_devs.h
- Selects SOC_INTEL_COMMON_FEATURE_SMIHANDLER Kconfig
- Removes src/soc/intel/pantherlake/smihandler.c
- Updates Makefile to remove smihandler.c compilation

Panther Lake uses PCI_DEV_PMC as the PMC device identifier.

TEST=Build and boot to the OS on a Fatcat device

Change-Id: I32bf4b678e7edda598319086acccc4983edcbe3e
Signed-off-by: Jeremy Compostella <jeremy.compostella@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/91296
Reviewed-by: Huang, Cliff <cliff.huang@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2026-03-01 17:03:24 +00:00
Jeremy Compostella
eb205e379a soc/intel/meteorlake: Use common PCH client SMI handler
Migrate Meteor Lake to use the common PCH client SMI handler
implementation from the Intel common feature code. This change
eliminates platform-specific code by leveraging the shared smihandler.c
driver.

This commit:
- Adds SOC_PMC_DEV macro definition to soc/pci_devs.h
- Selects SOC_INTEL_COMMON_FEATURE_SMIHANDLER Kconfig
- Removes src/soc/intel/meteorlake/smihandler.c
- Updates Makefile to remove smihandler.c compilation

Meteor Lake uses PCI_DEV_PMC as the PMC device identifier.

Change-Id: Ia21a6ee0c6fbee6d4ffcfce5fdbe9b3bdf5fcece
Signed-off-by: Jeremy Compostella <jeremy.compostella@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/91295
Reviewed-by: Huang, Cliff <cliff.huang@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2026-03-01 17:03:18 +00:00
Jeremy Compostella
f0021f84ec soc/intel/alderlake: Use common PCH client SMI handler
Migrate Alder Lake to use the common PCH client SMI handler
implementation from the Intel common feature code. This change
eliminates platform-specific code by leveraging the shared smihandler.c
driver.

This commit:
- Adds SOC_PMC_DEV macro definition to soc/pci_devs.h
- Selects SOC_INTEL_COMMON_FEATURE_SMIHANDLER Kconfig
- Removes src/soc/intel/alderlake/smihandler.c
- Updates Makefile to remove smihandler.c compilation

Alder Lake uses PCH_DEV_PMC as the PMC device identifier.

Change-Id: Icbbc7af25e73e952c9b5f811cf0bbe01efe3ae94
Signed-off-by: Jeremy Compostella <jeremy.compostella@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/91294
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Huang, Cliff <cliff.huang@intel.com>
2026-03-01 17:03:12 +00:00
Jeremy Compostella
4b73479c38 soc/intel/common/feature/smihandler: Add common PCH client SMI handler
Add a common implementation of SMI handler code for PCH client platforms
to reduce code duplication across Alder Lake, Meteor Lake, Panther Lake,
and Tiger Lake platforms.

This implementation consolidates:
- smihandler_soc_disable_busmaster(): Skip disabling PMC bus master
- southbridge_smi array: Standard SMI handler mappings

The common driver uses a platform-specific macro that must be defined in
each platform's soc/pci_devs.h header:
- SOC_PMC_DEV: PMC PCI device identifier

This change enables consolidation of nearly identical smihandler.c files
across four platforms, reducing duplication by approximately 100+ lines.

Change-Id: I9ecb65b7ea4feafb8acbaf5798bbeaeb80b7c24a
Signed-off-by: Jeremy Compostella <jeremy.compostella@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/91293
Reviewed-by: Huang, Cliff <cliff.huang@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2026-03-01 17:03:05 +00:00
Jeremy Compostella
2eb37453e5 soc/intel/meteorlake: Use common pmutil driver
Migrate Meteor Lake to use the common PMC utility driver instead
of maintaining platform-specific pmutil.c code.

This change:
- Enables SOC_INTEL_COMMON_FEATURE_PMUTIL in Kconfig
- Removes platform-specific pmutil.c
- Removes pmutil.c from Makefile.mk

The common driver provides all necessary functionality through
the generic config_t interface, eliminating ~290 lines of
duplicated code.

Change-Id: I1c46a517420c8ea7410c4ed7e8e7b761d4399cf9
Signed-off-by: Jeremy Compostella <jeremy.compostella@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/91240
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Huang, Cliff <cliff.huang@intel.com>
2026-03-01 17:02:59 +00:00
Jeremy Compostella
f0be882d9f soc/intel/pantherlake: Use common pmutil driver
Migrate Panther Lake to use the common PMC utility driver instead
of maintaining platform-specific pmutil.c code.

This change:
- Enables SOC_INTEL_COMMON_FEATURE_PMUTIL in Kconfig
- Removes platform-specific pmutil.c
- Removes pmutil.c from Makefile.mk

The common driver provides all necessary functionality through
the generic config_t interface, eliminating ~290 lines of
duplicated code.

TEST=Build and boot to the OS on a Fatcat device

Change-Id: I3ee9630a6b15d7b02776ff633a3cff0766a8915b
Signed-off-by: Jeremy Compostella <jeremy.compostella@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/91239
Reviewed-by: Huang, Cliff <cliff.huang@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2026-03-01 17:02:53 +00:00
Jeremy Compostella
2b70ce3fbf soc/intel/alderlake: Use common pmutil driver
Migrate Alder Lake to use the common PMC utility driver instead
of maintaining platform-specific pmutil.c code.

This change:
- Enables SOC_INTEL_COMMON_FEATURE_PMUTIL in Kconfig
- Removes platform-specific pmutil.c
- Removes pmutil.c from Makefile.mk

The common driver provides all necessary functionality through
the generic config_t interface, eliminating ~290 lines of
duplicated code.

Change-Id: Ieb62ffac95550a0ae8607a3a9ae76e0f6ff0ac35
Signed-off-by: Jeremy Compostella <jeremy.compostella@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/91238
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Huang, Cliff <cliff.huang@intel.com>
2026-03-01 17:02:47 +00:00
Jeremy Compostella
cc31cc0ab2 soc/intel/common/feature/pmutil: Add common pmutil driver
This adds a common PM utility driver for modern Intel platforms that
share consistent PM register layouts.

The driver consolidates power management utility functions that were
previously duplicated across multiple Intel SoC platforms. This
includes functions for:
- SMI/TCO/GPE status bit decoding
- PMC MMIO base address access
- RTC failure detection
- Sleep state management
- Power state structure population
- After-G3 power state configuration
- GPE configuration retrieval using generic config_t

The GPE configuration function (soc_get_gpi_gpe_configs) uses the
generic config_t typedef that each platform defines, allowing complete
code reuse without platform-specific shims.

This common driver is controlled by the Kconfig option
SOC_INTEL_COMMON_FEATURE_PMUTIL and is built for all boot stages.

Change-Id: I45b829b7c18ee66474457df5523069f930806b35
Signed-off-by: Jeremy Compostella <jeremy.compostella@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/91237
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Huang, Cliff <cliff.huang@intel.com>
2026-03-01 17:02:41 +00:00
Jeremy Compostella
189f8d1a86 soc/intel/elkhartlake: Switch to common eSPI/LPC initialization
Replace platform-specific espi.c with the common eSPI/LPC
initialization driver.

Changes:
- Remove src/soc/intel/elkhartlake/espi.c
- Enable SOC_INTEL_COMMON_FEATURE_ESPI in Kconfig
- Update Makefile.mk to remove espi.c from build

The eSPI/LPC initialization was nearly identical across platforms,
differing only in minor header inclusions and ENV_RAMSTAGE wrapper
usage. The common implementation uses the config_t typedef that
each platform defines, providing clean abstraction without
preprocessor conditionals.

Change-Id: I59d9cb1b37bca2c682e2bf87fc3f5b24c34fb920
Signed-off-by: Jeremy Compostella <jeremy.compostella@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/91222
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Guvendik, Bora <bora.guvendik@intel.com>
2026-03-01 17:02:34 +00:00
Jeremy Compostella
aeb9db4467 soc/intel/jasperlake: Switch to common eSPI/LPC initialization
Replace platform-specific espi.c with the common eSPI/LPC
initialization driver.

Changes:
- Remove src/soc/intel/jasperlake/espi.c
- Enable SOC_INTEL_COMMON_FEATURE_ESPI in Kconfig
- Update Makefile.mk to remove espi.c from build

The eSPI/LPC initialization was nearly identical across platforms,
differing only in minor header inclusions and ENV_RAMSTAGE wrapper
usage. The common implementation uses the config_t typedef that
each platform defines, providing clean abstraction without
preprocessor conditionals.

Change-Id: Ied29a5f2dabdebe0afedd1d69e4a817d6606a82d
Signed-off-by: Jeremy Compostella <jeremy.compostella@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/91221
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Guvendik, Bora <bora.guvendik@intel.com>
2026-03-01 17:02:29 +00:00
Jeremy Compostella
05006995b6 soc/intel/tigerlake: Switch to common eSPI/LPC initialization
Replace platform-specific espi.c with the common eSPI/LPC
initialization driver.

Changes:
- Remove src/soc/intel/tigerlake/espi.c
- Enable SOC_INTEL_COMMON_FEATURE_ESPI in Kconfig
- Update Makefile.mk to remove espi.c from build

The eSPI/LPC initialization was nearly identical across platforms,
differing only in minor header inclusions and ENV_RAMSTAGE wrapper
usage. The common implementation uses the config_t typedef that
each platform defines, providing clean abstraction without
preprocessor conditionals.

Change-Id: I65f8af8f5abccff25ec0dead4f7def7ce16d3081
Signed-off-by: Jeremy Compostella <jeremy.compostella@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/91220
Reviewed-by: Guvendik, Bora <bora.guvendik@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2026-03-01 17:02:23 +00:00
Jeremy Compostella
7278030fa6 soc/intel/pantherlake: Switch to common eSPI/LPC initialization
Replace platform-specific espi.c with the common eSPI/LPC
initialization driver.

Changes:
- Remove src/soc/intel/pantherlake/espi.c
- Enable SOC_INTEL_COMMON_FEATURE_ESPI in Kconfig
- Update Makefile.mk to remove espi.c from build

The eSPI/LPC initialization was nearly identical across platforms,
differing only in minor header inclusions and ENV_RAMSTAGE wrapper
usage. The common implementation uses the config_t typedef that
each platform defines, providing clean abstraction without
preprocessor conditionals.

TEST=Build and boot to the OS on a Fatcat device

Change-Id: If5f2de9faa209ff30f986f34b1816ffa6d5fc683
Signed-off-by: Jeremy Compostella <jeremy.compostella@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/91219
Reviewed-by: Guvendik, Bora <bora.guvendik@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2026-03-01 17:02:17 +00:00
Jeremy Compostella
4fe7e7fa36 soc/intel/meteorlake: Switch to common eSPI/LPC initialization
Replace platform-specific espi.c with the common eSPI/LPC
initialization driver.

Changes:
- Remove src/soc/intel/meteorlake/espi.c
- Enable SOC_INTEL_COMMON_FEATURE_ESPI in Kconfig
- Update Makefile.mk to remove espi.c from build

The eSPI/LPC initialization was nearly identical across platforms,
differing only in minor header inclusions and ENV_RAMSTAGE wrapper
usage. The common implementation uses the config_t typedef that
each platform defines, providing clean abstraction without
preprocessor conditionals.

Change-Id: Ifb198964c5eda1fceaec6111cd7fba374bacf1b6
Signed-off-by: Jeremy Compostella <jeremy.compostella@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/91218
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Guvendik, Bora <bora.guvendik@intel.com>
2026-03-01 17:02:11 +00:00
Jeremy Compostella
34be3842a1 soc/intel/alderlake: Switch to common eSPI/LPC initialization
Replace platform-specific espi.c with the common eSPI/LPC
initialization driver.

Changes:
- Remove src/soc/intel/alderlake/espi.c
- Enable SOC_INTEL_COMMON_FEATURE_ESPI in Kconfig
- Update Makefile.mk to remove espi.c from build

The eSPI/LPC initialization was nearly identical across platforms,
differing only in minor header inclusions and ENV_RAMSTAGE wrapper
usage. The common implementation uses the config_t typedef that
each platform defines, providing clean abstraction without
preprocessor conditionals.

Change-Id: Ifacdd480a9cfd59d9e54faebad82e1cc2db8a8ed
Signed-off-by: Jeremy Compostella <jeremy.compostella@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/91217
Reviewed-by: Guvendik, Bora <bora.guvendik@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2026-03-01 17:02:05 +00:00
Jeremy Compostella
0464f1032a soc/intel/common/feature/espi: Add common eSPI/LPC initialization
This introduces a common implementation for eSPI/LPC initialization
that handles generic IO decode range configuration and standard
interrupt setup. This code is nearly identical across multiple Intel
client platforms.

The implementation includes:
- soc_get_gen_io_dec_range(): Configures generic IO decode ranges
  from devicetree (gen1_dec through gen4_dec)
- lpc_soc_init(): Performs legacy ISA/DMA initialization, enables
  CLKRUN for power gating, configures Serial IRQ mode, and sets up
  the interrupt controllers (IOAPIC, PIRQ, i8259)

Platform-specific configuration is handled through the config_t
typedef that each platform defines via its soc_chip.h header,
eliminating the need for preprocessor conditionals.

The common driver is enabled via the SOC_INTEL_COMMON_FEATURE_ESPI
Kconfig option and works across bootblock, romstage, and ramstage.

Platforms that will use this common implementation:
- Alder Lake
- Meteor Lake
- Panther Lake
- Tiger Lake
- Jasper Lake
- Elkhart Lake

Change-Id: Idbdecff1cef44dae90afb35ff6e2afca011ea5b4
Signed-off-by: Jeremy Compostella <jeremy.compostella@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/91216
Reviewed-by: Huang, Cliff <cliff.huang@intel.com>
Reviewed-by: Guvendik, Bora <bora.guvendik@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2026-03-01 17:01:57 +00:00
Jeremy Compostella
f780b7c576 soc/intel/tigerlake: Use common SoundWire driver
Migrate Tiger Lake to use the common SoundWire driver implementation
from the Intel common feature code. This change eliminates platform-
specific code by leveraging the shared soundwire.c driver.

This commit:
- Selects SOC_INTEL_COMMON_FEATURE_SOUNDWIRE Kconfig
- Removes src/soc/intel/tigerlake/soundwire.c
- Updates Makefile to remove soundwire.c compilation

Tiger Lake uses the default values (4 SoundWire master links with ACPI
address 0x40000000).

Change-Id: Ife743d28c8760d9de3f593f7d8caafd7a73efe3a
Signed-off-by: Jeremy Compostella <jeremy.compostella@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/91280
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Huang, Cliff <cliff.huang@intel.com>
2026-03-01 17:01:46 +00:00
Jeremy Compostella
620a33f1c8 soc/intel/pantherlake: Use common SoundWire driver
Migrate Panther Lake to use the common SoundWire driver implementation
from the Intel common feature code. This change eliminates platform-
specific code by leveraging the shared soundwire.c driver.

This commit:
- Selects SOC_INTEL_COMMON_FEATURE_SOUNDWIRE Kconfig
- Removes src/soc/intel/pantherlake/soundwire.c
- Updates Makefile to remove soundwire.c compilation

Panther Lake uses the default values (4 SoundWire master links with ACPI
address 0x40000000).

TEST=Build and boot to the OS on a Fatcat device

Change-Id: Iaebb27ddc44da536c8e6a6aece1dfee3a4ac7bac
Signed-off-by: Jeremy Compostella <jeremy.compostella@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/91279
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Huang, Cliff <cliff.huang@intel.com>
2026-03-01 17:01:40 +00:00
Jeremy Compostella
ffc67b2938 soc/intel/meteorlake: Use common SoundWire driver
Migrate Meteor Lake to use the common SoundWire driver implementation
from the Intel common feature code. This change eliminates platform-
specific code by leveraging the shared soundwire.c driver.

This commit:
- Selects SOC_INTEL_COMMON_FEATURE_SOUNDWIRE Kconfig
- Removes src/soc/intel/meteorlake/soundwire.c
- Updates Makefile to remove soundwire.c compilation

Meteor Lake uses the default values (4 SoundWire master links with ACPI
address 0x40000000).

Change-Id: Ib6d412b22cce78caf56ca2d09fcf74e57f54d09c
Signed-off-by: Jeremy Compostella <jeremy.compostella@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/91278
Reviewed-by: Huang, Cliff <cliff.huang@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2026-03-01 17:01:33 +00:00
Jeremy Compostella
ef364d623d soc/intel/alderlake: Use common SoundWire driver
Migrate Alder Lake to use the common SoundWire driver implementation
from the Intel common feature code. This change eliminates platform-
specific code by leveraging the shared soundwire.c driver.

This commit:
- Selects SOC_INTEL_COMMON_FEATURE_SOUNDWIRE Kconfig
- Removes src/soc/intel/alderlake/soundwire.c
- Updates Makefile to remove soundwire.c compilation

Alder Lake uses the default values (4 SoundWire master links with ACPI
address 0x40000000).

Change-Id: Idf21d32d0cab9e3c6ca35e2b9f20c42c0455b5bb
Signed-off-by: Jeremy Compostella <jeremy.compostella@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/91277
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Huang, Cliff <cliff.huang@intel.com>
2026-03-01 17:01:26 +00:00
Jeremy Compostella
74d4fac210 soc/intel/common/feature/soundwire: Add common SoundWire driver
Add a common implementation of soc_fill_soundwire_controller() to reduce
code duplication across multiple Intel SoC platforms. This
implementation consolidates identical SoundWire link configuration code
from Alder Lake, Meteor Lake, Panther Lake, and Tiger Lake platforms.

The common driver uses platform-specific Kconfig options:
- SOC_SOUNDWIRE_ACPI_ADDRESS: ACPI address for the controller
  (default 0x40000000)
- SOC_SOUNDWIRE_MASTER_COUNT: Number of SoundWire master links
  (default 4)

Platforms can override these defaults in their Kconfig if needed.

This change enables consolidation of nearly identical soundwire.c files
across four platforms, reducing duplication by approximately 210 lines.

Change-Id: I5e188b0b60da91a33cf0325caefbbcabef0ebcba
Signed-off-by: Jeremy Compostella <jeremy.compostella@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/91276
Reviewed-by: Huang, Cliff <cliff.huang@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2026-03-01 17:01:20 +00:00
Patrick Rudolph
f4825e5c12 soc/amd/common: Add I3C driver
Add an I3C driver that allows to use the I3C HW from the OS.
It does:
- Power on/off the I3C HW
- Configures the IOMUX

Add the SoC specific AOAC devices and GPIO pins to reconfigure
the GPIO for I3C HW.

New log messages are seen in coreboot:
[DEBUG]  MMIO: fedd2000 disabled

TEST: The I3C driver loads on amd/glinda using Ubuntu 25.04.

Change-Id: Ibca20e2a4f0cb0e6006cfa47fd4addbe27504645
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/87960
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2026-02-27 13:02:58 +00:00
Jeremy Compostella
cf5d6f1c88 soc/intel/common/block/gspi: Simplify Makefile using all-$()
Replace individual stage-specific lines with all-$() for each file.
This simplifies the Makefile from 6 lines to 2 lines while maintaining
identical functionality.

The all-$() variable automatically includes the file in all build stages
(bootblock, verstage, romstage, postcar, ramstage, smm), which is
exactly what the original code was doing manually for each stage.

Change-Id: Ie89ba86a545c548fcc4ad0eb48a5cbb33733b541
Signed-off-by: Jeremy Compostella <jeremy.compostella@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/91358
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
2026-02-26 19:38:36 +00:00
Jeremy Compostella
56ede20f10 soc/intel/pantherlake: Use common SPI device function driver
Switch to the common SPI device function driver implementation. This
eliminates platform-specific SPI code by leveraging the common driver
with platform-specific Kconfig and macros.

This commit:
- Selects SOC_INTEL_COMMON_FEATURE_SPI_DEVFN and
  SOC_INTEL_COMMON_FEATURE_SPI_DEVFN_PSF in Kconfig
- Adds CONFIG_SOC_INTEL_SPI_DEV_MAX=3
- Adds CONFIG_SOC_INTEL_SPI_PSF_DESTINATION_ID=0x5140
- Removes src/soc/intel/pantherlake/spi.c
- Updates Makefile.mk to remove spi.c compilation

The common code uses SOC_GSPI_DEVFN(n) macro directly.

TEST=Panther Lake Fatcat OS boots properly

Change-Id: Id7462deeb80c1efe32accf0ab7fc9fa68494ddfd
Signed-off-by: Jeremy Compostella <jeremy.compostella@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/91328
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2026-02-26 19:38:28 +00:00
Jeremy Compostella
4bdeb73635 soc/intel/meteorlake: Use common SPI device function driver
Switch to the common SPI device function driver implementation. This
eliminates platform-specific SPI code by leveraging the common driver
with platform-specific Kconfig and macros.

This commit:
- Selects SOC_INTEL_COMMON_FEATURE_SPI_DEVFN and
  SOC_INTEL_COMMON_FEATURE_SPI_DEVFN_PSF in Kconfig
- Adds CONFIG_SOC_INTEL_SPI_DEV_MAX=3
- Adds CONFIG_SOC_INTEL_SPI_PSF_DESTINATION_ID=0x5140
- Removes src/soc/intel/meteorlake/spi.c
- Updates Makefile.mk to remove spi.c compilation

The common code uses SOC_GSPI_DEVFN(n) macro directly.

Change-Id: I6ac7bdf4c9eeaab2d0d0ecbe8cd2ea2bf7f9ea19
Signed-off-by: Jeremy Compostella <jeremy.compostella@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/91327
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
2026-02-26 19:38:21 +00:00
Jeremy Compostella
8ecff12528 soc/intel/alderlake: Use common SPI device function driver
Switch to the common SPI device function driver implementation. This
eliminates platform-specific SPI code by leveraging the common driver
with platform-specific Kconfig and macros.

This commit:
- Selects SOC_INTEL_COMMON_FEATURE_SPI_DEVFN and
  SOC_INTEL_COMMON_FEATURE_SPI_DEVFN_PSF in Kconfig
- Adds CONFIG_SOC_INTEL_SPI_DEV_MAX=4
- Adds CONFIG_SOC_INTEL_SPI_PSF_DESTINATION_ID=0x23a8
- Removes src/soc/intel/alderlake/spi.c
- Updates Makefile.mk to remove spi.c compilation

The common code uses SOC_GSPI_DEVFN(n) macro directly.

Change-Id: I346e6c6cbe95c8608009e5f9fc53dbcff5edba4e
Signed-off-by: Jeremy Compostella <jeremy.compostella@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/91326
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2026-02-26 19:38:15 +00:00
Jeremy Compostella
0aea05411d soc/intel/tigerlake: Use common SPI device function driver
Switch to the common SPI device function driver implementation. This
eliminates platform-specific SPI code by leveraging the common driver
with platform-specific Kconfig and macros.

This commit:
- Selects SOC_INTEL_COMMON_FEATURE_SPI_DEVFN and
  SOC_INTEL_COMMON_FEATURE_SPI_DEVFN_PSF in Kconfig
- Adds CONFIG_SOC_INTEL_SPI_DEV_MAX=3
- Adds CONFIG_SOC_INTEL_SPI_PSF_DESTINATION_ID (0x23b0 for PCH-H, 0x23a8
  default)
- Removes src/soc/intel/tigerlake/spi.c
- Updates Makefile.mk to remove spi.c compilation

The common code uses SOC_GSPI_DEVFN(n) macro directly.

Change-Id: Ib195ffcc0d46f7e95eba2d0a2c66fbcdcca615a2
Signed-off-by: Jeremy Compostella <jeremy.compostella@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/91325
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
2026-02-26 19:38:09 +00:00
Jeremy Compostella
47f3e7e3cc soc/intel/jasperlake: Use common SPI device function driver
Switch to the common SPI device function driver implementation. This
eliminates platform-specific SPI code by leveraging the common driver
with platform-specific Kconfig and macros.

This commit:
- Selects SOC_INTEL_COMMON_FEATURE_SPI_DEVFN in Kconfig
- Adds CONFIG_SOC_INTEL_SPI_DEV_MAX=3
- Removes src/soc/intel/jasperlake/spi.c
- Updates Makefile.mk to remove spi.c compilation

Note: This platform does not use PSF destination ID.
The common code uses SOC_GSPI_DEVFN(n) macro directly.

Change-Id: If42aa1f955bc0aae2698aac35dbe23b79c68bf09
Signed-off-by: Jeremy Compostella <jeremy.compostella@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/91324
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2026-02-26 19:38:03 +00:00
Jeremy Compostella
91520ab096 soc/intel/common/feature/spi: Add common SPI device function driver
Add a common driver for SPI device function to bus mapping. This
eliminates code duplication across Intel SoC platforms by providing
a generic implementation that can be configured via platform-specific
macros.

The driver provides:
- spi_soc_devfn_to_bus(): Convert device function to bus number using
  platform-defined SOC_SPI_DEVFN(n) macros
- soc_get_spi_psf_destination_id(): Optional PSF destination ID support
  for platforms that need it

Platforms must define SOC_SPI_DEVFN(n) in soc/pci_devs.h.

Platforms must define the following Kconfig:
- SOC_INTEL_SPI_DEV_MAX: Number of SPI controllers available on the
  platform.
- SOC_INTEL_COMMON_FEATURE_SPI_DEVFN_PSF: To enable PSF designation, the
  ID must be provided with SOC_INTEL_SPI_PSF_DESTINATION_ID.
- SOC_INTEL_SPI_PSF_DESTINATION_ID: (optional) PSF destination ID for
  SPI controller.

Change-Id: I07ded6e6d2156a02eef7b4fea86ac1c8fa5ff3ce
Signed-off-by: Jeremy Compostella <jeremy.compostella@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/91323
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2026-02-26 19:37:57 +00:00
Jeremy Compostella
0668959a92 soc/intel/skylake: Use common GSPI devfn mapping
Replace platform-specific gspi.c with the common GSPI device function
mapping implementation.

Changes:
- Select SOC_INTEL_COMMON_FEATURE_GSPI_DEVFN in Kconfig
- Define SOC_GSPI_DEVFN(n) macro in pci_devs.h
- Remove platform-specific gspi.c file

Change-Id: Ib7c8d9e0f1a2b3c4d5e6f7a8b9c0d1e2f3a4b5c6
Signed-off-by: Jeremy Compostella <jeremy.compostella@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/91321
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
2026-02-26 19:37:42 +00:00
Jeremy Compostella
45d3ab84a8 soc/intel/cannonlake: Use common GSPI devfn mapping
Replace platform-specific gspi.c with the common GSPI device function
mapping implementation.

Changes:
- Select SOC_INTEL_COMMON_FEATURE_GSPI_DEVFN in Kconfig
- Define SOC_GSPI_DEVFN(n) macro in pci_devs.h
- Remove platform-specific gspi.c file

Change-Id: Ia6b7c8d9e0f1a2b3c4d5e6f7a8b9c0d1e2f3a4b5
Signed-off-by: Jeremy Compostella <jeremy.compostella@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/91320
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2026-02-26 19:37:34 +00:00
Jeremy Compostella
4aae5fb66d soc/intel/elkhartlake: Use common GSPI devfn mapping
Replace platform-specific gspi.c with the common GSPI device function
mapping implementation.

Changes:
- Select SOC_INTEL_COMMON_FEATURE_GSPI_DEVFN in Kconfig
- Define SOC_GSPI_DEVFN(n) macro in pci_devs.h
- Remove platform-specific gspi.c file

Change-Id: If6a7b8c9d0e1f2a3b4c5d6e7f8a9b0c1d2e3f4a5
Signed-off-by: Jeremy Compostella <jeremy.compostella@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/91319
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2026-02-26 19:37:27 +00:00
Jeremy Compostella
78ef2d0433 soc/intel/jasperlake: Use common GSPI devfn mapping
Replace platform-specific gspi.c with the common GSPI device function
mapping implementation.

Changes:
- Select SOC_INTEL_COMMON_FEATURE_GSPI_DEVFN in Kconfig
- Define SOC_GSPI_DEVFN(n) macro in pci_devs.h
- Remove platform-specific gspi.c file

Change-Id: Ie5f6a7b8c9d0e1f2a3b4c5d6e7f8a9b0c1d2e3f4
Signed-off-by: Jeremy Compostella <jeremy.compostella@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/91318
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
2026-02-26 19:37:20 +00:00
Jeremy Compostella
66a6c25ef8 soc/intel/tigerlake: Use common GSPI devfn mapping
Replace platform-specific gspi.c with the common GSPI device function
mapping implementation.

Changes:
- Select SOC_INTEL_COMMON_FEATURE_GSPI_DEVFN in Kconfig
- Define SOC_GSPI_DEVFN(n) macro in pci_devs.h
- Remove platform-specific gspi.c file

Change-Id: Id4e5f6a7b8c9d0e1f2a3b4c5d6e7f8a9b0c1d2e3
Signed-off-by: Jeremy Compostella <jeremy.compostella@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/91317
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2026-02-26 19:37:13 +00:00
Jeremy Compostella
3c92c8402a soc/intel/pantherlake: Use common GSPI devfn mapping
Replace platform-specific gspi.c with the common GSPI device function
mapping implementation.

Changes:
- Select SOC_INTEL_COMMON_FEATURE_GSPI_DEVFN in Kconfig
- Define SOC_GSPI_DEVFN(n) macro in pci_devs.h
- Remove platform-specific gspi.c file

TEST=Panther Lake Fatcat OS boots properly

Change-Id: Ic3d4e5f6a7b8c9d0e1f2a3b4c5d6e7f8a9b0c1d2
Signed-off-by: Jeremy Compostella <jeremy.compostella@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/91316
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2026-02-26 19:37:04 +00:00
Jeremy Compostella
6459039b76 soc/intel/meteorlake: Use common GSPI devfn mapping
Replace platform-specific gspi.c with the common GSPI device function
mapping implementation.

Changes:
- Select SOC_INTEL_COMMON_FEATURE_GSPI_DEVFN in Kconfig
- Define SOC_GSPI_DEVFN(n) macro in pci_devs.h
- Remove platform-specific gspi.c file

Change-Id: Ib2c3d4e5f6a7b8c9d0e1f2a3b4c5d6e7f8a9b0c1
Signed-off-by: Jeremy Compostella <jeremy.compostella@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/91315
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2026-02-26 19:36:57 +00:00
Jeremy Compostella
039f21b5e3 soc/intel/alderlake: Use common GSPI devfn mapping
Replace platform-specific gspi.c with the common GSPI device function
mapping implementation.

Changes:
- Select SOC_INTEL_COMMON_FEATURE_GSPI_DEVFN in Kconfig
- Define SOC_GSPI_DEVFN(n) macro in pci_devs.h
- Remove platform-specific gspi.c file

Change-Id: Ia1b2c3d4e5f6a7b8c9d0e1f2a3b4c5d6e7f8a9b0
Signed-off-by: Jeremy Compostella <jeremy.compostella@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/91314
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2026-02-26 19:36:50 +00:00
Jeremy Compostella
a4bc3131a5 soc/intel/common/feature/gspi: Add common devfn mapping
Add a common implementation of gspi_soc_bus_to_devfn() to reduce code
duplication across multiple Intel SoC platforms. This implementation
uses the SOC_GSPI_DEVFN(n) macro which must be defined by each platform
in their soc/pci_devs.h header to map GSPI bus numbers to PCI device and
function values.

This change enables consolidation of nearly identical gspi.c files from
Alder Lake, Meteor Lake, Panther Lake, Tiger Lake, Jasper Lake, Elkhart
Lake, Cannon Lake, and Skylake platforms.

The implementation leverages the existing
CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_MAX Kconfig option and includes
compile-time assertions to ensure the configuration is within supported
limits (up to 7 GSPI controllers).

Change-Id: I776cebd70968fd4b8bbab176bca0a446a0cc76ab
Signed-off-by: Jeremy Compostella <jeremy.compostella@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/91322
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2026-02-26 19:36:45 +00:00
Angel Pons
72ecebf0c3 soc/intel/broadwell/acpi/xhci.asl: Use macros for constants
Declaring named objects for constants is not ideal, especially when done
inside of a method (it is highly inefficient). Instead, use preprocessor
defines.

Change-Id: I2d9d17b820ee72ba628b44ae508a7c467c023dd9
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/91394
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
2026-02-26 19:33:56 +00:00
Jeremy Compostella
d5161611a4 soc/intel/pantherlake: Use common I2C devfn mapping
Replace platform-specific i2c.c with common implementation.

Defines SOC_I2C_DEVFN(n) macro and uses existing
CONFIG_SOC_INTEL_I2C_DEV_MAX Kconfig.

Change-Id: I9200c41bf459dfef29599cc1c736e14e8cbd36b9
Signed-off-by: Jeremy Compostella <jeremy.compostella@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/91266
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Guvendik, Bora <bora.guvendik@intel.com>
2026-02-26 16:31:42 +00:00
Jeremy Compostella
78e36f8c78 soc/intel/meteorlake: Use common I2C devfn mapping
Replace platform-specific i2c.c with common implementation.

Defines SOC_I2C_DEVFN(n) macro and uses existing
CONFIG_SOC_INTEL_I2C_DEV_MAX Kconfig.

Change-Id: Ifab488ada515656a5108aee5a6f481abda6a9c0d
Signed-off-by: Jeremy Compostella <jeremy.compostella@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/91265
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Guvendik, Bora <bora.guvendik@intel.com>
2026-02-26 16:31:33 +00:00
Jeremy Compostella
f703f2800c soc/intel/skylake: Use common I2C devfn mapping
Replace platform-specific i2c.c with common implementation.

Defines SOC_I2C_DEVFN(n) macro and uses existing
CONFIG_SOC_INTEL_I2C_DEV_MAX Kconfig.

Change-Id: I9ae46e252c599e4ee82a60c03a8d83f874a8da98
Signed-off-by: Jeremy Compostella <jeremy.compostella@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/91264
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Guvendik, Bora <bora.guvendik@intel.com>
2026-02-26 16:31:20 +00:00
Jeremy Compostella
7f922438be soc/intel/cannonlake: Use common I2C devfn mapping
Replace platform-specific i2c.c with common implementation.

Defines SOC_I2C_DEVFN(n) macro and uses existing
CONFIG_SOC_INTEL_I2C_DEV_MAX Kconfig.

Change-Id: I0117a418d35cea3e7c0442c8c3ea27d17b8bdf06
Signed-off-by: Jeremy Compostella <jeremy.compostella@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/91263
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Guvendik, Bora <bora.guvendik@intel.com>
2026-02-26 16:31:11 +00:00
Jeremy Compostella
a0ba812a09 soc/intel/jasperlake: Use common I2C devfn mapping
Replace platform-specific i2c.c with common implementation.

Defines SOC_I2C_DEVFN(n) macro and uses existing
CONFIG_SOC_INTEL_I2C_DEV_MAX Kconfig.

Change-Id: Ia98748818fde9d1048355d4a144211a327c453ba
Signed-off-by: Jeremy Compostella <jeremy.compostella@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/91262
Reviewed-by: Guvendik, Bora <bora.guvendik@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2026-02-26 16:31:02 +00:00
Jeremy Compostella
83325f354b soc/intel/tigerlake: Use common I2C devfn mapping
Replace platform-specific i2c.c with common implementation.

Defines SOC_I2C_DEVFN(n) macro and uses existing
CONFIG_SOC_INTEL_I2C_DEV_MAX Kconfig.

Change-Id: Id8ac536813cadedc8d49ccb922d583a678436d2e
Signed-off-by: Jeremy Compostella <jeremy.compostella@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/91261
Reviewed-by: Guvendik, Bora <bora.guvendik@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2026-02-26 16:30:46 +00:00
Jeremy Compostella
fe728d62c9 soc/intel/elkhartlake: Use common I2C devfn mapping
Replace platform-specific i2c.c with common implementation.

Defines SOC_I2C_DEVFN(n) macro and uses existing
CONFIG_SOC_INTEL_I2C_DEV_MAX Kconfig.

Change-Id: I09aec87fbac0861d3b50d26f475016fdd5aa6fb7
Signed-off-by: Jeremy Compostella <jeremy.compostella@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/91260
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Guvendik, Bora <bora.guvendik@intel.com>
2026-02-26 16:30:37 +00:00
Jeremy Compostella
749bae2f94 soc/intel/alderlake: Use common I2C devfn mapping
Replace platform-specific i2c.c with common implementation.

Defines SOC_I2C_DEVFN(n) macro and uses existing
CONFIG_SOC_INTEL_I2C_DEV_MAX Kconfig.

Change-Id: I5d8420231d1252986b8b7274a4c8c2f6d41f759d
Signed-off-by: Jeremy Compostella <jeremy.compostella@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/91259
Reviewed-by: Guvendik, Bora <bora.guvendik@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2026-02-26 16:30:28 +00:00
Jeremy Compostella
b21e861ab5 soc/intel/common/feature/i2c: Add common devfn mapping
Introduce a common implementation for I2C device function to bus
number mapping that can be shared across multiple Intel SoC platforms.

The implementation uses:
- CONFIG_SOC_INTEL_I2C_DEV_MAX: Kconfig value for max I2C controllers
- SOC_I2C_DEVFN(n): SoC-specific macro for I2C devfn names

This eliminates duplicate code across platforms that follow the
standard I2C controller numbering scheme.

Change-Id: Ib242d7a839ccb26394794382098cecb658adf698
Signed-off-by: Jeremy Compostella <jeremy.compostella@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/91258
Reviewed-by: Guvendik, Bora <bora.guvendik@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2026-02-26 16:30:13 +00:00
Patrick Rudolph
34c156427d soc/intel/common/block/lpc: Fix AMASK decoding in window detection
Commit 339ef9b5c9 ("soc/intel/common/block/lpc: Improve automatic
window opening") introduced a bug in the decoding of existing LPC I/O
window sizes from the LGIR (LPC Generic I/O Range) registers.

The AMASK field in the LGIR register stores bits [7:2] of the address
mask, with bits [1:0] implicitly always set to 1 (representing 4-byte
granularity). The original implementation incorrectly calculated the
window size as:

  exist_size = 1 + ((reg32 & LPC_LGIR_AMASK_MASK) >> 16)

This fails to restore the implicit lower bits [1:0] of the mask.

For example, a window programmed with size 8 bytes:
- Stored mask: (8-1) & 0xfc = 0x4 (bits [7:2] only)
- Incorrectly decoded: 0x4 + 1 = 5 bytes (WRONG)
- Correctly decoded: (0x4 | 0x3) + 1 = 8 bytes (CORRECT)

This bug caused failures on Panther Lake boards where existing windows
were not recognized as covering requested ranges, leading to:

  [ERROR] LPC: Cannot open IO window: 800 size 8
  [ERROR] No more IO windows

The fix properly reconstructs the full mask by OR-ing in the implicit
bits [1:0] before calculating the size:

  exist_size = ((amask_raw & 0xfc) | 0x3) + 1

BUG=b:486133237
TEST=Boot Panther Lake Fatcat board, verify no LPC window errors

Change-Id: I0b5f95c01da6ce84924a038106edec600e3b97f8
Signed-off-by: Jeremy Compostella <jeremy.compostella@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/91418
Reviewed-by: Subrata Banik <subratabanik@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Pranava Y N <pranavayn@google.com>
2026-02-26 16:12:08 +00:00