coreboot/src
Curtis Chen eb005f5f5c mb/google/brya/var: Clarify comment for 'tcss_aux_ori'
For the latest trulo projects: kaladin,pujjolo,pujjocent,
the original comment was too brief and led to some misunderstanding.
In the past years, only retimer has the SBU muxing function. Or said,
only retimer has Aux Orientation feature. So, 'no retimer' implies
Aux Orientation feature inside the processor is needed.

And now, the modern future PDC also has the Aux Orientation feature.
Not all "no retimer" cases require setting the override bit anymore.
The even numbered bits should be set only when there is no retimer and
the processor's Aux Orientation is still required.
(If set, the SoC inverts the orientation value coming from EC/PDC when
operating in flipped orientation.)

In the referenced issue tracker, the system has 'no retimer' and uses
a 'future PDC'. (The PDC has the Aux Orientation feature.)
Test results (DP + TCSS):
  - 'tcss_aux_ori' = 0 + PDC sends orientation detected value -> PASS
  - 'tcss_aux_ori' = 5 + PDC sends 'original' value           -> PASS
  - 'tcss_aux_ori' = 5 + PDC sends orientation detected value -> FAIL
     (Fail means only display one side.)

This patch updates the comment to more accurately describe the expected
usage and avoid future confusion.

Refer doc#:
646929 TWL PDG
734752 TCSS Cookbook (MTL Backward/MTL/PTL/WCL)
627270 TWL Bios Spec
758766 MTL Bios Spec
766031 MTL PDG

BUG=b:4292672
BRANCH=none
TEST=Update coreboot device tree with different tcss_aux_ori value and
     test the DP connection via TCSS on 2 orientations.

Change-Id: I3281110e522c53a35abf30fd1c372bb5ca18c10d
Signed-off-by: Curtis Chen <curtis.chen@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/88482
Reviewed-by: Eric Lai <ericllai@google.com>
Reviewed-by: Kapil Porwal <kapilporwal@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2025-07-25 17:10:15 +00:00
..
acpi drivers/crb/tpm: Add new method to retrieve base address 2025-07-02 16:15:09 +00:00
arch arch/x86: Add support for cooperative multitasking on x86_64 2025-07-13 18:55:39 +00:00
commonlib commonlib/include/commonlib: Add volatile qualifier 2025-07-22 16:30:38 +00:00
console
cpu soc/amd/common/block/cpu/noncar: Move BSS and DATA out of PT_LOAD 2025-07-18 16:50:07 +00:00
device device/dram: Rename 'USE_DDRx' config options 2025-07-25 17:03:02 +00:00
drivers sb/intel: Convert set_gpio to gpio_set 2025-07-25 17:05:54 +00:00
ec sb/intel: Convert get_gpio() to gpio_get() 2025-07-25 17:05:12 +00:00
include {lib, drivers/intel}: Move BMP rendering logic out of SoC code 2025-07-23 17:11:10 +00:00
lib {lib, drivers/intel}: Move BMP rendering logic out of SoC code 2025-07-23 17:11:10 +00:00
mainboard mb/google/brya/var: Clarify comment for 'tcss_aux_ori' 2025-07-25 17:10:15 +00:00
northbridge device/dram: Rename 'USE_DDRx' config options 2025-07-25 17:03:02 +00:00
sbom sbom: Fix build with merged bootblock and romstage 2025-07-07 14:29:29 +00:00
security security/vboot: Back up CMOS data later boot phase 2025-06-05 13:36:19 +00:00
soc soc/intel/xeon_sp: Remove fast_spi_cache_bios_region 2025-07-25 17:08:06 +00:00
southbridge sb/intel/common: Remove unused function prototype 2025-07-25 17:07:26 +00:00
superio src/superio/nuvoton: Add HWM initialization code 2025-06-11 13:31:25 +00:00
vendorcode vc/intel/fsp/fsp2_0/wcl: Add FSP headers for WCL FSP 2025-07-18 01:15:12 +00:00
Kconfig security/vboot: Back up CMOS data later boot phase 2025-06-05 13:36:19 +00:00