The MMU configuration in qc_mmu_dram_config_post_dram_init() needs to
include the memory region allocated for DMA coherent buffers.
Map the `postram_dma_coherent` region as UNCACHED_RAM to ensure memory
writes bypass the CPU cache hierarchy.
The mapping is only configured if the `_postram_dma_coherent` address
is different from `_preram_dma_coherent` address aka migration of the
region.
This is necessary for DMA operations that occur after DRAM is
initialized.
BUG=b:456953373
TEST=Able to build google/quenbi.
Change-Id: If5f625ad74f4f6ea244c8b377543be3666122cea
Signed-off-by: Subrata Banik <subratabanik@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/90050
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-by: Kapil Porwal <kapilporwal@google.com>
958099b114