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commonlib: Add timestamps for Qualcomm QCLib and ARM TFA

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This patch adds new timestamp IDs to track the execution flow within
the Qualcomm QCLib and the loading of the Secure OS (BL32) by the ARM
Trusted Firmware (TFA).

The following new IDs are introduced:
- TS_QUALCOMM_QCLIB_INIT_START (980)
- TS_QUALCOMM_QCLIB_INIT_END (981)
- TS_QUALCOMM_QCLIB_REINIT_START (982)
- TS_QUALCOMM_QCLIB_REINIT_END (983)
- TS_TFA_LOAD_BL32_START (998)
- TS_TFA_LOAD_BL32_END (999)

The reserved ID ranges are updated to accommodate these new vendor-
specific and architecture-specific timestamps:
- Intel/FSP range reduced from 950-989 to 950-980.
- A new range 980-990 is allocated for qualcomm/qclib.
- The Intel ME continued range is updated from 990-999 to 990-997.
- A new range 998-999 is allocated for ARM Trusted Firmware.

Change-Id: I904ac36862212a86961383dfe5e9b0f7ef0f02ea
Signed-off-by: Subrata Banik <subratabanik@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/90111
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kapil Porwal <kapilporwal@google.com>
This commit is contained in:
Subrata Banik 2025-11-19 12:36:43 +05:30
commit 0145ebe847
1 changed files with 20 additions and 2 deletions
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22
src/commonlib/include/commonlib/timestamp_serialized.h
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@ -127,7 +127,7 @@ enum timestamp_id {
TS_CSE_FW_SYNC_START = 948,
TS_CSE_FW_SYNC_END = 949,
/* 950+ reserved for vendorcode extensions (950-989: intel/fsp) */
/* 950+ reserved for vendorcode extensions (950-980: intel/fsp) */
TS_FSP_MEMORY_INIT_START = 950,
TS_FSP_MEMORY_INIT_END = 951,
TS_FSP_TEMP_RAM_EXIT_START = 952,
@ -147,11 +147,20 @@ enum timestamp_id {
TS_FSP_MEMORY_INIT_LOAD = 970,
TS_FSP_SILICON_INIT_LOAD = 971,
/* 990+ reserved for vendorcode extensions (990-999: Intel ME continued) */
/* 980+ reserved for vendorcode extensions (980-990: qualcomm/qclib) */
TS_QUALCOMM_QCLIB_INIT_START = 980,
TS_QUALCOMM_QCLIB_INIT_END = 981,
TS_QUALCOMM_QCLIB_REINIT_START = 982,
TS_QUALCOMM_QCLIB_REINIT_END = 983,
/* 990+ reserved for vendorcode extensions (990-997: Intel ME continued) */
TS_ME_ROM_START = 990,
TS_ISSE_DMU_LOAD_END = 991,
TS_ESE_LOAD_AUNIT_END = 992,
/* 998-999 reserved for ARM Trusted firmware) */
TS_TFA_LOAD_BL32_START = 998,
TS_TFA_LOAD_BL32_END = 999,
/* 1000+ reserved for payloads */
/* 1000-1200: Depthcharge */
@ -353,11 +362,20 @@ static const struct timestamp_id_to_name {
TS_NAME_DEF(TS_FSP_MEMORY_INIT_LOAD, 0, "loading FSP-M"),
TS_NAME_DEF(TS_FSP_SILICON_INIT_LOAD, 0, "loading FSP-S"),
/* Qualcomm QCLib related timestamps */
TS_NAME_DEF(TS_QUALCOMM_QCLIB_INIT_START, 0, "Entering into QcLib"),
TS_NAME_DEF(TS_QUALCOMM_QCLIB_INIT_END, 0, "returning from QcLib"),
TS_NAME_DEF(TS_QUALCOMM_QCLIB_REINIT_START, 0, "Reentering from QcLib"),
TS_NAME_DEF(TS_QUALCOMM_QCLIB_REINIT_END, 0, "QcLib execution completed"),
/* Intel ME continued */
TS_NAME_DEF(TS_ME_ROM_START, 0, "CSME ROM started execution"),
TS_NAME_DEF(TS_ISSE_DMU_LOAD_END, 0, "Die Management Unit (DMU) load completed"),
TS_NAME_DEF(TS_ESE_LOAD_AUNIT_END, 0, "ESE completed AUnit loading"),
TS_NAME_DEF(TS_TFA_LOAD_BL32_START, 0, "BL32(secure_os) loading start"),
TS_NAME_DEF(TS_TFA_LOAD_BL32_END, 0, "BL32(secure_os) loading end"),
/* Depthcharge entry timestamp */
TS_NAME_DEF(TS_DC_START, 0, "depthcharge start"),