Ronald G. Minnich
bde25c214d
Fixed so all IORRs get 0'ed
2001-06-09 18:18:59 +00:00
Ronald G. Minnich
80f9c91e66
Works now.
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pcchips is now pretty fast!
2001-06-08 23:22:43 +00:00
Ronald G. Minnich
8df16b00d8
Added support for a cpufixup function.
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See src/cpu/k7/Config for details.
2001-06-08 17:18:43 +00:00
Li-Ta Lo
1115c4d2af
use #ifdef i686 to protect Pentium class processors from hanging
2001-04-25 02:34:00 +00:00
Eric W. Biederman
39b133810a
Minor fixes
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- Add IMB to the palcode in start.inc
- Reduce the heap to only 128K in alpha/ldscript.base
- In elfboot add checks to make certain we don't overwrite linuxBIOS...
2001-04-13 22:04:26 +00:00
Ronald G. Minnich
3a8ce19f87
we need cache_enable and disable visible.
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failed attempts to get the acer northbridge to size ram
CV:S ----------------------------------------------------------------------
2001-04-12 18:36:53 +00:00
Eric W. Biederman
0785f9f233
Final updates for my code cleanup and alpha code merge.
2001-03-23 22:56:05 +00:00
Ronald G. Minnich
faf0c47b79
testing I HATE CVS
2001-03-22 21:26:32 +00:00
Ronald G. Minnich
227ca052f7
Changes from Eric for Alpha and other support
2001-03-13 04:22:19 +00:00
Ronald G. Minnich
af5eaf5b29
Changes to support 440BX
2001-02-08 16:17:38 +00:00
Li-Ta Lo
70d361e5f8
fix some rounding problem
2001-01-29 02:12:35 +00:00
Ronald G. Minnich
b56912ec3a
Fixes for CMD_LINE, and other fixes to set up ga-6bxc.
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mtrr.c, remove redundant define
string.h bug with 0 in strlen
2001-01-18 23:11:26 +00:00
Li-Ta Lo
719f89882d
found an very very old bug on setting MTRR range
2001-01-04 07:50:56 +00:00
Li-Ta Lo
27a812455f
fix some typo
2000-12-07 01:43:28 +00:00
Li-Ta Lo
54e665686e
more clean up for printk messages
2000-12-06 11:02:36 +00:00
Li-Ta Lo
ba4403a177
finally, a fullproof implementation for MTRR setting
2000-12-06 03:58:57 +00:00
Li-Ta Lo
7f6e048fc0
a smarter Late MTRR implementation
2000-12-05 07:25:32 +00:00
Li-Ta Lo
9b604b8ca7
use the safer movzwl instead of movl
2000-12-05 02:07:37 +00:00
Li-Ta Lo
fd4ec49f7d
clear and set MTRRs correctly, I hope
2000-12-04 09:54:04 +00:00
Li-Ta Lo
d3e4c27442
use TSC to minotoring the performance of LinuxBIOS
2000-12-02 05:48:29 +00:00
Li-Ta Lo
69f93c224c
add more
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#ifndef lint
static char rcsid[] = "$Id:$";
#endif
to *.c source
2000-12-02 03:51:28 +00:00
Li-Ta Lo
7d651021b2
l2_cache.c works fine, put DBG back to printk.h
2000-12-02 03:33:36 +00:00
Ronald G. Minnich
d96429d1e2
l2 cache bug
2000-12-01 23:35:17 +00:00
Li-Ta Lo
f0ea4a2bc0
Debug message is disabled by default now. If you want to show the message,
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please add "option DEBUG" in the config file or in the C source
#define DEBUG
#include <printk.h>
2000-12-01 08:59:47 +00:00
Li-Ta Lo
075e8642af
add cvs identification string
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#ifndef lint
static char rcsid[] = "$Id:$";
#endif
2000-12-01 01:43:51 +00:00
Ronald G. Minnich
4cf942c02f
added l2_cache.o object
2000-11-29 21:22:50 +00:00
Ronald G. Minnich
48607dd0b7
L2 cache code is solid. Experimenting with VIA SPD code -- no good.
2000-11-29 19:46:39 +00:00
Li-Ta Lo
bb441faa1c
minor clean up in mtrr.c
2000-11-29 09:05:58 +00:00
Ronald G. Minnich
cd664e0cd3
support for variable size memory on sis
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added debugging to fill_inbuf
2000-11-28 05:23:02 +00:00
Ronald G. Minnich
a2edf7acdd
Missing stuff.
2000-11-28 04:55:17 +00:00
Ronald G. Minnich
a627e0bf31
per denis, add cache_disable call.
2000-11-25 04:13:05 +00:00
Li-Ta Lo
ab0636c99d
reformt with indent -kr -i8
2000-11-25 01:07:15 +00:00
Li-Ta Lo
4aec1cf42a
clean up on Makefiles and MTRR/L2 stuff
2000-11-24 04:16:50 +00:00
Ronald G. Minnich
8fa4c17322
We now support l2 cache!
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first cut at acer m1631 support.
2000-11-21 17:30:21 +00:00
Ronald G. Minnich
ab80324461
Tweaks for VIA SPD support.
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Added L2 cache support.
2000-11-21 01:17:56 +00:00
Ronald G. Minnich
21322ba3b7
mtrr fixes for 630, they are a hack now.
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ipl.S: check for FRAMEBUFFER, don't set 0x63 if HAVE_FRAMEBUFFER not
defined.
Starting support for L440GX
2000-11-01 03:08:35 +00:00
Ronald G. Minnich
787deb4ae4
Fixes so we don't use any of the standard include paths
2000-10-17 22:58:51 +00:00
Ronald G. Minnich
934e5e0403
reorg
2000-10-17 13:18:43 +00:00
Ronald G. Minnich
69e023b385
Code reorg
2000-10-16 23:47:28 +00:00
Ronald G. Minnich
96fa389618
Building the new src tree
2000-10-16 03:03:03 +00:00