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Debug message is disabled by default now. If you want to show the message,

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please add "option DEBUG" in the config file or in the C source

#define DEBUG
#include <printk.h>
This commit is contained in:
Li-Ta Lo 2000-12-01 08:59:47 +00:00
commit f0ea4a2bc0
10 changed files with 129 additions and 148 deletions
Download patch file Download diff file Expand all files Collapse all files

193
src/cpu/p5/cpuid.c
View file

@ -16,24 +16,24 @@ int intel_mtrr_check(void)
{
unsigned long low, high;
printk(KERN_INFO "\nMTRR check\n");
DBG("\nMTRR check\n");
rdmsr(0x2ff, low, high);
low = low >> 10;
printk(KERN_INFO "Fixed MTRRs : ");
DBG("Fixed MTRRs : ");
if (low & 0x01)
printk(KERN_INFO "Enabled\n");
DBG("Enabled\n");
else
printk(KERN_INFO "Disabled\n");
DBG("Disabled\n");
printk(KERN_INFO "Variable MTRRs: ");
DBG("Variable MTRRs: ");
if (low & 0x02)
printk(KERN_INFO "Enabled\n");
DBG("Enabled\n");
else
printk(KERN_INFO "Disabled\n");
DBG("Disabled\n");
printk(KERN_INFO "\n");
DBG("\n");
return ((int) low);
}
@ -46,40 +46,40 @@ void intel_display_cpuid(void)
max_op = 0;
printk(KERN_INFO "\n");
DBG("\n");
for (op = 0; op <= max_op; op++) {
intel_cpuid(op, &eax, &ebx, &ecx, &edx);
if (0 == op) {
max_op = eax;
printk(KERN_INFO "Max cpuid index : %d\n", eax);
printk(KERN_INFO "Vendor ID : "
"%c%c%c%c%c%c%c%c%c%c%c%c\n",
ebx, ebx >> 8, ebx >> 16, ebx >> 24, edx,
edx >> 8, edx >> 16, edx >> 24, ecx, ecx >> 8,
ecx >> 16, ecx >> 24);
DBG("Max cpuid index : %d\n", eax);
DBG("Vendor ID : "
"%c%c%c%c%c%c%c%c%c%c%c%c\n",
ebx, ebx >> 8, ebx >> 16, ebx >> 24, edx,
edx >> 8, edx >> 16, edx >> 24, ecx, ecx >> 8,
ecx >> 16, ecx >> 24);
} else if (1 == op) {
printk(KERN_INFO "Processor Type : 0x%02x\n",
(eax >> 12) & 0x03);
printk(KERN_INFO "Processor Family : 0x%02x\n",
(eax >> 8) & 0x0f);
printk(KERN_INFO "Processor Model : 0x%02x\n",
(eax >> 4) & 0x0f);
printk(KERN_INFO "Processor Mask : 0x%02x\n",
(ecx >> 0) & 0x0f);
printk(KERN_INFO "Processor Stepping : 0x%02x\n",
(eax >> 0) & 0x0f);
printk(KERN_INFO "Feature flags : 0x%08x\n", edx);
DBG("Processor Type : 0x%02x\n",
(eax >> 12) & 0x03);
DBG("Processor Family : 0x%02x\n",
(eax >> 8) & 0x0f);
DBG("Processor Model : 0x%02x\n",
(eax >> 4) & 0x0f);
DBG("Processor Mask : 0x%02x\n",
(ecx >> 0) & 0x0f);
DBG("Processor Stepping : 0x%02x\n",
(eax >> 0) & 0x0f);
DBG("Feature flags : 0x%08x\n", edx);
} else if (2 == op) {
int desc[4];
int ii;
int _desc;
printk(KERN_INFO "\n");
DBG("\n");
printk(KERN_INFO "Cache/TLB descriptor values: %d "
"reads required\n", eax & 0xff);
DBG("Cache/TLB descriptor values: %d "
"reads required\n", eax & 0xff);
desc[0] = eax;
desc[1] = ebx;
@ -88,133 +88,132 @@ void intel_display_cpuid(void)
for (ii = 1; ii < 16; ii++) {
if (desc[ii >> 2] & 0x80000000) {
printk(KERN_INFO
"reserved descriptor\n");
DBG("reserved descriptor\n");
continue;
}
_desc =
((desc[ii>>2]) >> ((ii & 0x3) << 3)) & 0xff;
printk(KERN_INFO "Desc 0x%02x : ", _desc);
((desc[ii >> 2]) >> ((ii & 0x3) << 3))
& 0xff;
DBG("Desc 0x%02x : ", _desc);
switch (_desc) {
case 0x00:
printk(KERN_INFO "null\n");
DBG("null\n");
break;
case 0x01:
printk(KERN_INFO "Instr TLB: "
"4KB pages, "
"4-way set assoc, "
"32 entries\n");
DBG("Instr TLB: "
"4KB pages, "
"4-way set assoc, "
"32 entries\n");
break;
case 0x02:
printk(KERN_INFO "Instr TLB: "
"4MB pages, "
"fully assoc, "
"2 entries\n");
DBG("Instr TLB: "
"4MB pages, "
"fully assoc, " "2 entries\n");
break;
case 0x03:
printk(KERN_INFO "Data TLB: "
"4KB pages, "
"4-way set assoc, "
"64 entries\n");
DBG("Data TLB: "
"4KB pages, "
"4-way set assoc, "
"64 entries\n");
break;
case 0x04:
printk(KERN_INFO "Data TLB: "
"4MB pages, "
"4-way set assoc, "
"8 entries\n");
DBG("Data TLB: "
"4MB pages, "
"4-way set assoc, "
"8 entries\n");
break;
case 0x06:
printk(KERN_INFO "Inst cache: "
"8K bytes, "
"4-way set assoc, "
"32 byte line size\n");
DBG("Inst cache: "
"8K bytes, "
"4-way set assoc, "
"32 byte line size\n");
break;
case 0x08:
printk(KERN_INFO "Inst cache: "
"16K bytes, "
"4-way set assoc, "
"32 byte line size\n");
DBG("Inst cache: "
"16K bytes, "
"4-way set assoc, "
"32 byte line size\n");
break;
case 0x0a:
printk(KERN_INFO "Data cache: "
"8K bytes, "
"2-way set assoc, "
"32 byte line size\n");
DBG("Data cache: "
"8K bytes, "
"2-way set assoc, "
"32 byte line size\n");
break;
case 0x0c:
printk(KERN_INFO "Data cache: "
"16K bytes, "
"2-way or 4-way set assoc, "
"32 byte line size\n");
DBG("Data cache: "
"16K bytes, "
"2-way or 4-way set assoc, "
"32 byte line size\n");
break;
case 0x40:
printk(KERN_INFO "No L2 cache\n");
DBG("No L2 cache\n");
break;
case 0x41:
printk(KERN_INFO "L2 Unified cache: "
"128K bytes, "
"4-way set assoc, "
"32 byte line size\n");
DBG("L2 Unified cache: "
"128K bytes, "
"4-way set assoc, "
"32 byte line size\n");
break;
case 0x42:
printk(KERN_INFO "L2 Unified cache: "
"256K bytes, "
"4-way set assoc, "
"32 byte line size\n");
DBG("L2 Unified cache: "
"256K bytes, "
"4-way set assoc, "
"32 byte line size\n");
break;
case 0x43:
printk(KERN_INFO "L2 Unified cache: "
"512K bytes, "
"4-way set assoc, "
"32 byte line size\n");
DBG("L2 Unified cache: "
"512K bytes, "
"4-way set assoc, "
"32 byte line size\n");
break;
case 0x44:
printk(KERN_INFO "L2 Unified cache: "
"1M byte, "
"4-way set assoc, "
"32 byte line size\n");
DBG("L2 Unified cache: "
"1M byte, "
"4-way set assoc, "
"32 byte line size\n");
break;
case 0x45:
printk(KERN_INFO "L2 Unified cache: "
"2M byte, "
"4-way set assoc, "
"32 byte line size\n");
DBG("L2 Unified cache: "
"2M byte, "
"4-way set assoc, "
"32 byte line size\n");
break;
case 0x82:
printk(KERN_INFO "L2 Unified cache: "
"256K bytes, "
"8-way set assoc, "
"32 byte line size\n");
DBG("L2 Unified cache: "
"256K bytes, "
"8-way set assoc, "
"32 byte line size\n");
break;
default:
printk(KERN_INFO "UNKNOWN\n");
DBG("UNKNOWN\n");
}
}
printk(KERN_INFO "\n");
DBG("\n");
} else {
printk(KERN_INFO "op: 0x%02x eax:0x%08x "
"ebx:0x%08x ecx:0x%08x edx:0x%08x\n",
op, eax, ebx, ecx, edx);
DBG("op: 0x%02x eax:0x%08x "
"ebx:0x%08x ecx:0x%08x edx:0x%08x\n",
op, eax, ebx, ecx, edx);
}
}
printk(KERN_INFO "\n");
DBG("\n");
}

8
src/cpu/p6/l2_cache.c
View file

@ -36,10 +36,10 @@ static char rcsid[] = "$Id$";
#include <cpu/p6/msr.h>
#include <cpu/p6/mtrr.h>
#include <cpu/p5/cpuid.h>
#include <printk.h>
/* Include debugging code and outputs */
#define DEBUG
#include <printk.h>
static int signal_l2(unsigned int address_high,
unsigned int address_low,
@ -59,12 +59,6 @@ static int calculate_l2_cache_size(void);
static int calculate_l2_physical_address_range(void);
static int calculate_l2_ecc(void);
#ifdef DEBUG
#define DBG(x...) printk(KERN_DEBUG x)
#else
#define DBG(x...)
#endif
static void cache_disable(void)
{
unsigned int tmp;

6
src/include/printk.h
View file

@ -15,4 +15,10 @@
extern int console_loglevel;
int printk(const char *fmt, ...);
#ifdef DEBUG
#define DBG(x...) printk(KERN_DEBUG x)
#else
#define DBG(x...)
#endif
#endif

7
src/lib/linuxbiosmain.c
View file

@ -23,17 +23,10 @@
extern void intel_post(char value);
#define DEBUG
#define ERRCHK
#undef TRACEV
#define MALLOCDBG
#ifdef DEBUG
#define DBG(x...) printk(KERN_DEBUG x)
#else
#define DBG(x...)
#endif
/*
* gzip declarations
*/

9
src/lib/linuxpci.c
View file

@ -20,15 +20,8 @@ static char rcsid[] = "$Id$";
#include <types.h>
extern void intel_post(unsigned char value);
#define DEBUG
#undef DEBUGSCAN
#ifdef DEBUG
#define DBG(x...) printk(KERN_DEBUG x)
#else
#define DBG(x...)
#endif
#ifdef DEBUGSCAN
#define DBGSCAN(x...) printk(KERN_DEBUG x)
#else

6
src/lib/newpci.c
View file

@ -19,12 +19,6 @@ static char rcsid[] = "$Id$";
#include <cpu/p5/io.h>
#include <printk.h>
#ifdef DEBUG
#define DBG(x...) printk(KERN_DEBUG x)
#else
#define DBG(x...)
#endif
#define ONEMEG (1 << 20)
#define PCI_MEM_START 0x80000000

5
src/lib/subr.c
View file

@ -217,9 +217,8 @@ void intel_check_irq_routing_table(void)
for (i = 0; i < rt->size; i++)
sum += addr[i];
printk(KERN_DEBUG "%s:%6d:%s() - "
"irq_routing_table located at: 0x%p\n",
__FILE__, __LINE__, __FUNCTION__, addr);
DBG("%s:%6d:%s() - irq_routing_table located at: 0x%p\n",
__FILE__, __LINE__, __FUNCTION__, addr);
sum = (unsigned char)(rt->checksum-sum);

4
src/northsouthbridge/sis/630/ipl.S
View file

@ -355,13 +355,13 @@ doc_cycle_end:
ret
sdram_type_bank_1:
# Column Number 8 9 10 11 Row Number
# Column Number 8 9 10 11 Row Number
.byte 0b0000, 0b0100, 0b1000, 0xff # 11
.byte 0xff, 0xff, 0xff, 0xff # 12
.byte 0b0001, 0b0101, 0b1001, 0b1101 # 13
sdram_type_bank_2:
# Column Number 8 9 10 11 Row Number
# Column Number 8 9 10 11 Row Number
.byte 0b1100, 0xff, 0xff, 0xff # 11
.byte 0b0010, 0b0110, 0b1010, 0b1110 # 12
.byte 0b0011, 0b0111, 0b1011, 0b1111 # 13

4
src/northsouthbridge/sis/630/raminit.inc
View file

@ -70,6 +70,10 @@ write_common:
outb %al, %dx
ret # End of write_[lpc|pci]_reg
#ifdef SIS630S
#include "630s_regs.inc"
#else /* !SIS630S */
#include "630_regs.inc"
#endif
register_setting_end:

35
src/superio/sis/950/superio.c
View file

@ -41,32 +41,31 @@ void enable_floppy()
void
enable_com(int com)
{
unsigned char b;
/* now set the LDN to com LDN */
outb(0x7, 0x2e); /* pick reg. 7 */
outb(com, 0x2f); /* LDN 0 to reg. 7 */
unsigned char b;
/* now set the LDN to com LDN */
outb(0x7, 0x2e); /* pick reg. 7 */
outb(com, 0x2f); /* LDN 0 to reg. 7 */
/* now select register 0x30, and set bit 1 in that register */
outb(0x30, 0x2e);
outb(0x1, 0x2f);
/* now select register 0x30, and set bit 1 in that register */
outb(0x30, 0x2e);
outb(0x1, 0x2f);
/* set CLKIN frequence to 24 MHZ */
outb(0x24, 0x2e);
b = inb(0x2f) | 0xfd;
outb(0x24, 0x2e);
outb(b, 0x2f);
/* set CLKIN frequence to 24 MHZ */
outb(0x24, 0x2e);
b = inb(0x2f) | 0xfd;
outb(0x24, 0x2e);
outb(b, 0x2f);
}
void
final_superio_fixup()
{
enter_pnp();
enter_pnp();
#ifdef MUST_ENABLE_FLOPPY
enable_floppy();
enable_floppy();
#endif
enable_com(PNP_COM1_DEVICE);
enable_com(PNP_COM2_DEVICE);
enable_com(PNP_COM1_DEVICE);
enable_com(PNP_COM2_DEVICE);
exit_pnp();
exit_pnp();
}