Final updates for my code cleanup and alpha code merge.

This commit is contained in:
Eric W. Biederman 2001-03-23 22:56:05 +00:00
commit 0785f9f233
19 changed files with 224 additions and 1926 deletions

View file

@ -1,5 +1,5 @@
biosbase 0
rambase 0x10000
rambase 0x8000
makedefine LINK = ld -T ldscript.ld -o $@ crt0.o linuxbios.a
makedefine CPPFLAGS= -I$(TOP)/src/include -I$(TOP)/src/arch/$(ARCH)/include $(CPUFLAGS)
makedefine CFLAGS= $(CPU_OPT) $(CPPFLAGS) -O2 -nostdinc -nostdlib -fno-builtin -Wall

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@ -1,2 +1,2 @@
makedefine ARCH=i386
dir boot
dir lib

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@ -1,4 +1,3 @@
option i586
object cpuid.o
#object tsc.o
dir /arch/i386

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@ -35,7 +35,7 @@ int intel_mtrr_check(void)
DBG("\n");
intel_post(0x93);
post_code(0x93);
return ((int) low);
}
#endif
@ -217,5 +217,5 @@ void intel_display_cpuid(void)
}
DBG("\n");
intel_post(0x92);
post_code(0x92);
}

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@ -32,6 +32,7 @@ static char rcsid[] = "$Id$";
#include <cpu/p6/msr.h>
#include <cpu/p6/mtrr.h>
#include <printk.h>
#include <subr.h>
#define arraysize(x) (sizeof(x)/sizeof((x)[0]))
@ -205,7 +206,7 @@ void intel_set_mtrr(unsigned long rambase, unsigned long ramsizeK)
DBG("\n");
while (ramsizeK != 0 && reg <= 6) {
intel_post(0x60 + reg);
post_code(0x60 + reg);
range_wb = 1 << (fms(ramsizeK - 1) + 1);
range_uc = range_wb - ramsizeK;

View file

@ -1,10 +1,7 @@
#ifndef _SERIAL_SUBR_H_
#define _SERIAL_SUBR_H_
void ttys0_tx_char(char data);
void ttys0_tx_string(char *data);
void ttys0_tx_hex_digit(char data);
void ttys0_tx_hex(unsigned int data, int digits);
void ttys0_tx_int(int data);
void ttys0_init(void);
void ttys0_tx_byte(unsigned char data);
#endif /* _SERIAL_SUBR_H_ */

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@ -1,48 +1,11 @@
#ifndef SUBR_H_
#define SUBR_H_
/*
* Read/Write the special configuration registers on the INTEL
*/
// TODO: split this thing up. Delete the intel_ names
// that really are not intel-specific, e.g. intel_conf_readb should
// be conf_readb -- those addresses are defined in the PCI spec.
unsigned char intel_conf_readb(unsigned long port);
void intel_conf_writeb(unsigned long port, unsigned char value);
void intel_keyboard_on();
void intel_smpblock(void *v);
void intel_nvram_on();
#include <stdint.h>
void displayinit(void);
void display(char msg[]);
void printnibl(unsigned long nibl);
void printchar(unsigned char x);
void printint(unsigned long x);
void error(char errmsg[]);
void intel_post(unsigned char value);
void intel_conf_writeb(unsigned long port, unsigned char value);
unsigned char intel_conf_readb(unsigned long port);
void intel_cache_on(unsigned long base, unsigned long totalram);
void intel_interrupts_on(void);
void pc_keyboard_init(void);
void intel_mainboard_fixup(void);
unsigned long sizeram(void);
#ifdef INTEL_PPRO_MTRR
void intel_set_mtrr(unsigned long rambase, unsigned long ramsizeK);
#endif
#include <pci.h>
/* FIXME: how should we handle other architectures for pci access here ?? */
#include <pci-i386.h>
#define PIRQ_SIGNATURE (('$' << 0) + ('P' << 8) + ('I' << 16) + ('R' << 24))
#define PIRQ_VERSION 0x0100
extern const struct irq_routing_table intel_irq_routing_table;
void intel_zero_irq_settings(void);
void intel_check_irq_routing_table(void);
void post_code(uint8_t value);
#endif /* SUBR_H_ */

View file

@ -1,10 +1,14 @@
object fill_inbuf.o
object hardwaremain.o
object linuxbiosmain.o
object linuxpci.o
object newpci.o
object params.o
object printk.o
object serial_subr.o
object subr.o
object vsprintf.o
object memset.o
object memcpy.o
object memcmp.o
object malloc.o
object elfboot.o
object do_inflate.o

File diff suppressed because it is too large Load diff

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@ -18,8 +18,9 @@ static char rcsid[] = "$Id$";
#include <cpu/p5/io.h>
#include <printk.h>
#include <types.h>
#include <string.h>
#include <subr.h>
extern void intel_post(unsigned char value);
#undef DEBUGSCAN
#ifdef DEBUGSCAN
@ -204,7 +205,7 @@ unsigned int pci_scan_bus(struct pci_bus *bus)
bus_last = &bus->devices;
max = bus->secondary;
intel_post(0x24);
post_code(0x24);
/* probe all devices on this bus with some optimization for non-existance and
single funcion devices */
@ -322,7 +323,7 @@ unsigned int pci_scan_bus(struct pci_bus *bus)
}
}
intel_post(0x25);
post_code(0x25);
/*
* After performing arch-dependent fixup of the bus, look behind
* all PCI-to-PCI bridges on this bus.
@ -454,7 +455,7 @@ unsigned int pci_scan_bus(struct pci_bus *bus)
* Return how far we've got finding sub-buses.
*/
DBG("PCI: pci_scan_bus returning with max=%02x\n", max);
intel_post(0x55);
post_code(0x55);
return max;
}

View file

@ -16,7 +16,7 @@ static char rcsid[] = "$Id$";
#include <pci.h>
#undef __KERNEL__
#include <cpu/p5/io.h>
#include <arch/io.h>
#include <printk.h>
#define ONEMEG (1 << 20)

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@ -2,8 +2,8 @@
static char rcsid[] = "$Id$";
#endif
#include <cpu/p5/io.h>
#include "serial_subr.h"
#include <arch/io.h>
#include <serial_subr.h>
/* Base Address */
#define TTYS0 0x3f8
@ -26,52 +26,33 @@ static char rcsid[] = "$Id$";
#define TTYS0_MSR (TTYS0+0x06)
#define TTYS0_SCR (TTYS0+0x07)
void ttys0_tx_char(char data) {
#ifndef TTYS0_BAUD
#define TTYS0_BAUD 115200
#endif
#if ((115200%TTYS0_BAUD) != 0)
#error Bad ttys0 baud rate
#endif
#define TTYS0_DIV (115200/TTYS0_BAUD)
void ttys0_init(void)
{
/* disable interrupts */
outb(0x0, TTYS0_IER);
/* disable fifo's */
outb(0x0, TTYS0_FCR);
outb(0x83, TTYS0_LCR);
/* Set Baud Rate Divisor to 12 ==> 115200 Baud */
outb(TTYS0_DIV, TTYS0_DLL);
outb(0, TTYS0_DLM);
outb(0x03, TTYS0_LCR);
}
void ttys0_tx_byte(unsigned char data)
{
while (!(inb(TTYS0_LSR) & 0x20))
;
outb(data, TTYS0_TBR);
}
void ttys0_tx_string(char *data) {
while (*data) {
if (*data=='\n') ttys0_tx_char('\r');
ttys0_tx_char(*data++);
}
}
void ttys0_tx_hex_digit(char data) {
data &= 0x0f;
if (data>9) {
data += ('a'-10);
} else {
data += '0';
}
ttys0_tx_char(data);
}
void ttys0_tx_hex(unsigned int data, int digits) {
int ii;
/* ttys0_tx_string("0x"); */
for (ii = 0; ii < digits; ii++) {
ttys0_tx_hex_digit((char)(data >> ((digits - ii - 1)*4)));
}
}
void ttys0_tx_int(int data) {
int ii, i2;
int digit[30];
ii = 0;
do {
digit[ii] = data % 10;
data = data/10;
} while ((ii++ < 30) && data);
for (i2 = 0; i2 < ii; i2++) {
ttys0_tx_hex_digit((char)digit[ii-i2-1]);
}
}

View file

@ -8,28 +8,37 @@
static char rcsid[] = "$Id$";
#endif
#include <cpu/p5/io.h>
#include <cpu/p5/macros.h>
#include <cpu/p6/msr.h>
#include <arch/io.h>
#include <printk.h>
#include <pci.h>
#include <subr.h>
#include <string.h>
#ifdef SERIAL_CONSOLE
#include <serial_subr.h>
#endif
#ifdef VIDEO_BIOS_WORKS
# error the video display code has not been tested
// kludgy but this is only used here ...
static char *vidmem; /* The video buffer, should be replaced by symbol in ldscript.ld */
static int line_number;
static int video_line, video_col;
#define LINES 25 /* Number of lines and */
#define COLS 80 /* columns on display */
#define VIDBUFFER 0x20000;
#ifdef VIDEO_SCROLLING
static void scroll()
static void video_init(void)
{
video_line = 0;
video_col = 0;
vidmem = (char *) VIDBUFFER;
memset(vidmem, 0, 64*1024);
}
static void video_scroll(void)
{
int i;
@ -37,70 +46,64 @@ static void scroll()
for (i = (LINES - 1) * COLS * 2; i < LINES * COLS * 2; i += 2)
vidmem[i] = ' ';
}
#endif
static void video_tx_byte(unsigned char byte)
{
if (byte == '\n') {
video_line++;
}
else if (byte == '\r') {
video_col = 0;
}
else {
videmem[((video_col + (video_line *COLS)) * 2)] = byte;
videmem[((video_col + (video_line *COLS)) * 2) +1] = 0x07;
video_col++;
}
if (video_col >= COLS) {
video_line++;
video_col = 0;
}
if (video_line >= LINES) {
video_scroll();
video_line--;
}
}
#endif /* VIDEO_BIOS_WORKS */
// initialize the display
void displayinit(void)
{
line_number = 0;
vidmem = (char *) VIDBUFFER;
memset(vidmem, 0, 64 * 1024);
#ifdef SERIAL_CONSOLE
#endif
}
void display(char msg[])
{
int i = 0;
#ifdef SERIAL_CONSOLE
ttys0_tx_string(msg);
#endif
#ifdef VIDEO_BIOS_WORKS
while (msg[i] != 0) {
vidmem[(line_number + 1) * COLS * 2 + i * 2] = msg[i];
vidmem[(line_number + 1) * COLS * 2 + i * 2 + 1] = 0x07;
i++;
video_init();
#endif
#ifdef SERIAL_CONSOLE
ttys0_init();
#endif
}
void display_tx_byte(unsigned char byte)
{
#ifdef VIDEO_BIOS_WORKS
video_tx_byte(byte);
#endif
#ifdef SERIAL_CONSOLE
ttys0_tx_byte(byte);
#endif
#ifdef SROM_CONSOLE
srom_tx_byte(byte);
#endif
}
void display(char *string)
{
while(*string) {
if (*string == '\n') {
display_tx_byte('\r');
}
display_tx_byte(*string);
string++;
}
(line_number >= (LINES - 1)) ? scroll() : line_number++;
#else /* VIDEO_BIOS_WORKS */
while (msg[i] != 0)
vidmem[(line_number++)] = msg[i++];
/* vidmem[(line_number++)]= 0; */
#endif /* VIDEO_BIOS_WORKS */
}
void printnibl(unsigned long nibl)
{
static char c[2];
nibl &= 0xf;
c[0] = nibl;
c[1] = 0;
if ((nibl >= 0) && (nibl <= 9))
c[0] += '0';
else
c[0] += ('A' - 10);
display(c);
}
void printchar(unsigned char x)
{
int i;
for (i = 4; i >= 0; i -= 4)
printnibl(x >> i);
display(" ");
}
void printint(unsigned long x)
{
int i;
display(" 0x");
for (i = 28; i >= 0; i -= 4)
printnibl(x >> i);
display(" ");
}
void error(char errmsg[])
@ -112,7 +115,7 @@ void error(char errmsg[])
/*
* Write POST information
*/
void intel_post(unsigned char value)
void post_code(uint8_t value)
{
unsigned long hi, lo;
outb(value, 0x80);
@ -123,157 +126,3 @@ void intel_post(unsigned char value)
#endif
}
void intel_cache_on(unsigned long base, unsigned long totalram)
{
intel_post(0x60);
/* we need an #ifdef i586 here at some point ... */
__asm__ __volatile__("mov %cr0, %eax\n\t"
"and $0x9fffffff,%eax\n\t"
"mov %eax, %cr0\n\t");
/* turns out cache isn't really on until you set MTRR registers on
* 686 and later.
* NOTHING FANCY. Linux does a much better job anyway.
* so absolute minimum needed to get it going.
*/
/* OK, linux it turns out does nothing. We have to do it ... */
#ifdef i686
// totalram here is in linux sizing, i.e. units of KB.
// set_mtrr is responsible for getting it into the right units!
intel_set_mtrr(base, totalram);
#endif
intel_post(0x6A);
}
void intel_interrupts_on()
{
/* this is so interrupts work. This is very limited scope --
* linux will do better later, we hope ...
*/
/* this is the first way we learned to do it. It fails on real SMP
* stuff. So we have to do things differently ...
* see the Intel mp1.4 spec, page A-3
*/
#ifdef SMP
unsigned long reg, *regp;
#define SVR 0xfee000f0
#define LVT1 0xfee00350
#define LVT2 0xfee00360
#define APIC_ENABLED 0x100
printk(KERN_INFO "Enabling interrupts...");
regp = (unsigned long *) SVR;
reg = *regp;
reg &= (~0xf0);
reg |= APIC_ENABLED;
*regp = reg;
regp = (unsigned long *) LVT1;
reg = *regp;
reg &= 0xfffe00ff;
reg |= 0x5700;
*regp = reg;
regp = (unsigned long *) LVT2;
reg = *regp;
reg &= 0xfffe00ff;
reg |= 0x5400;
*regp = reg;
#else
unsigned long low, high;
printk(KERN_INFO "Enabling interrupts...");
rdmsr(0x1b, low, high);
low &= ~0x800;
wrmsr(0x1b, low, high);
#endif
printk(KERN_INFO "done.\n");
intel_post(0x9b);
}
/* These functions should be chip-set independent -tds */
void intel_zero_irq_settings(void)
{
struct pci_dev *pcidev;
unsigned char line;
printk(KERN_INFO "Zeroing IRQ settings...");
pcidev = pci_devices;
while (pcidev) {
pci_read_config_byte(pcidev, 0x3d, &line);
if (line) {
pci_write_config_byte(pcidev, 0x3c, 0);
}
pcidev = pcidev->next;
}
printk(KERN_INFO "done.\n");
}
void intel_check_irq_routing_table(void)
{
#ifdef HAVE_PIRQ_TABLE
const u8 *addr;
const struct irq_routing_table *rt;
int i;
u8 sum;
printk(KERN_INFO "Checking IRQ routing tables...");
rt = &intel_irq_routing_table;
addr = (u8 *)rt;
sum = 0;
for (i = 0; i < rt->size; i++)
sum += addr[i];
DBG("%s:%6d:%s() - irq_routing_table located at: 0x%p\n",
__FILE__, __LINE__, __FUNCTION__, addr);
sum = (unsigned char)(rt->checksum-sum);
if (sum != rt->checksum) {
printk(KERN_WARNING "%s:%6d:%s() - "
"checksum is: 0x%02x but should be: 0x%02x\n",
__FILE__, __LINE__, __FUNCTION__, rt->checksum, sum);
}
if (rt->signature != PIRQ_SIGNATURE || rt->version != PIRQ_VERSION ||
rt->size % 16 || rt->size < sizeof(struct irq_routing_table)) {
printk(KERN_WARNING "%s:%6d:%s() - "
"Interrupt Routing Table not valid\n",
__FILE__, __LINE__, __FUNCTION__);
return;
}
sum = 0;
for (i=0; i<rt->size; i++)
sum += addr[i];
if (sum) {
printk(KERN_WARNING "%s:%6d:%s() - "
"checksum error in irq routing table\n",
__FILE__, __LINE__, __FUNCTION__);
}
printk(KERN_INFO "done.\n");
#endif /* #ifdef HAVE_PIRQ_TABLE */
}
#define RTABLE_DEST 0xf0000
void intel_copy_irq_routing_table(void)
{
#ifdef HAVE_PIRQ_TABLE
printk(KERN_INFO "Copying IRQ routing tables...");
memcpy((char *) RTABLE_DEST, &intel_irq_routing_table, intel_irq_routing_table.size);
printk(KERN_INFO "done.\n");
#endif
}

View file

@ -1,5 +1,5 @@
northbridge alpha/tsunami
southbridge ali/m1543
southbridge acer/m1543
#southbridge...
#superio...

View file

@ -15,10 +15,10 @@ void pc_keyboard_init()
/* empty inut bufferm or any other command/data will be lost */
while ((inb(0x64) & 0x02))
intel_post(0);
post_code(0);
/* empty output buffer or any other command/data will be lost */
while ((inb(0x64) & 0x01) == 0)
intel_post(1);
post_code(1);
/* read self-test result, 0x55 should be returned form 0x60 */
if ((regval = inb(0x60) != 0x55))
@ -27,28 +27,28 @@ void pc_keyboard_init()
/* enable keyboard interface */
outb(0x60, 0x64);
while ((inb(0x64) & 0x02))
intel_post(2);
post_code(2);
/* send cmd: enable IRQ 1 */
outb(0x61, 0x60);
while ((inb(0x64) & 0x02))
intel_post(3);
post_code(3);
/* reset kerboard and self test (keyboard side) */
outb(0xff, 0x60);
/* empty inut bufferm or any other command/data will be lost */
while ((inb(0x64) & 0x02))
intel_post(4);
post_code(4);
/* empty output buffer or any other command/data will be lost */
while ((inb(0x64) & 0x01) == 0)
intel_post(5);
post_code(5);
if ((regval = inb(0x60) != 0xfa))
return;
while ((inb(0x64) & 0x01) == 0)
intel_post(6);
post_code(6);
if ((regval = inb(0x60) != 0xaa))
return;
}

View file

@ -26,13 +26,42 @@
#define TTYS0_TX_AL \
mov %al, %ah ; \
9: mov $TTYS0_LSR, %dx ; \
inb %dx, %al ; \
test $0x20, %al ; \
inb %dx, %al ; \
test $0x20, %al ; \
je 9b ; \
mov $TTYS0_TBR, %dx ; \
mov %ah, %al ; \
mov %ah, %al ; \
outb %al, %dx
/* uses: ax, dx */
#define TTYS0_TX_BYTE(byte) \
mov byte, %al ; \
TTYS0_TX_AL
/* uses: ax, dx */
#define TTYS0_TX_AL_HEX8 \
mov $TTYS0_SCR, %dx ; \
outb %al, %dx ; \
shr $4, %al ; \
add $'0', %al ; \
cmp $'9', %al ; \
jle 9f ; \
add $39, %al ; \
9: ; \
TTYS0_TX_AL ; \
mov $TTYS0_SCR, %dx ; \
inb %dx, %al ; \
and $0x0f, %al ; \
add $'0', %al ; \
cmp $'9', %al ; \
jle 9f ; \
add $39, %al ; \
9: ; \
TTYS0_TX_AL ; \
mov $TTYS0_SCR, %dx ; \
inb %dx, %al
/* uses: esp, ax, dx */
#define TTYS0_TX_CHAR(byte) \
mov byte, %al ; \

View file

@ -1,6 +1,7 @@
#include <pci.h>
#include <pc80/keyboard.h>
#include <printk.h>
#include <subr.h>
void
southbridge_fixup()
@ -27,7 +28,7 @@ void nvram_on()
if (pcidev) pci_write_config_word(pcidev, 0x4e, 0x03c3);
printk(KERN_INFO "done.\n");
intel_post(0x91);
post_code(0x91);
}
// Have to talk to Eric Beiderman about this ...
@ -37,7 +38,7 @@ void nvram_on()
#ifdef NO_KEYBOARD
void keyboard_on()
{
intel_post(0x94);
post_code(0x94);
}
#else
void keyboard_on()
@ -80,6 +81,6 @@ void keyboard_on()
/* now keyboard should work, ha ha. */
pc_keyboard_init();
intel_post(0x94);
post_code(0x94);
}
#endif

View file

View file

@ -7,6 +7,12 @@ import string
debug = 0;
# Architecture variables
arch = '';
makebase = '';
crt0base = '';
ldscriptbase = '';
makeoptions = {};
# rule format. Key is the rule name. value is a list of lists. The first
# element of the list is the dependencies, the rest are actions.
@ -15,10 +21,10 @@ treetop = '';
outputdir = '';
# config variables for the ldscript
data = 0x4000;
bss = 0x5000;
stack = 0x90000;
linuxbiosbase = 0xf0000;
# Initialize the to zero so we get a link error if the
# are not set.
rambase = 0;
linuxbiosbase = 0;
objectrules = [];
userrules = [];
@ -90,13 +96,25 @@ def common_command_action(dir, type, name):
handleconfig(realpath)
return fullpath
def set_arch(dir, my_arch):
global arch, makebase, crt0base, ldscriptbase
arch = my_arch
configpath = os.path.join(treetop, os.path.join("src/arch/", os.path.join(my_arch, "config")))
makebase = os.path.join(configpath, "make.base")
crt0base = os.path.join(configpath, "crt0.base")
ldscriptbase = os.path.join(configpath, "ldscript.base")
print "Now Process the ", my_arch, " base files"
if (debug):
print "Makebase is :", makebase, ":"
makedefine(dir, "ARCH="+my_arch)
doconfigfile(treetop, makebase)
def dir(base_dir, name):
regexp = re.compile(r"^/(.*)")
m = regexp.match(name)
if m and m.group(1):
# /dir
fullpath = os.path.join("src", m.group(1))
fullpath = os.path.join(treetop, fullpath)
fullpath = os.path.join(treetop, m.group(1))
else:
# dir
fullpath = os.path.join(base_dir, name)
@ -123,10 +141,12 @@ def northsouthbridge(dir, northsouthbridge_name):
def northbridge(dir, northbridge_name):
common_command_action(dir, 'northbridge', northbridge_name)
fullpath = common_command_action(dir, 'northbridge', northbridge_name)
command_vals["northbridge"] = [fullpath]
def southbridge(dir, southbridge_name):
common_command_action(dir, 'southbridge', southbridge_name)
fullpath = common_command_action(dir, 'southbridge', southbridge_name)
command_vals["southbridge"] = [fullpath]
def pcibridge(dir, pcibridge_name):
common_command_action(dir, 'picbridge', picbridge_name)
@ -223,7 +243,7 @@ def commandline(dir, command):
# we do all these rules by hand because docipl will always be special
# it's more or less a stand-alone bootstrap
def docipl(dir, ipl_name):
global data, bss, stack, linuxbiosbase
global rambase, linuxbiosbase
mainboard = command_vals['mainboard']
mainboard_dir = os.path.join(treetop, 'src', mainboard)
# add the docipl rule
@ -236,23 +256,20 @@ def docipl(dir, ipl_name):
# Now we need a mainboard-specific include path
userrules.append("\tcc $(CPUFLAGS) -I%s -c $<" % mainboard_dir)
# now set new values for the ldscript.ld. Should be a script?
data = 0x4000
bss = 0x5000
stack = 0x90000
rambase = 0x4000
linuxbiosbase = 0x80000
def linux(dir, linux_name):
linuxrule = 'LINUX=' + linux_name
makedefine(dir, linuxrule)
def setdata(dir, address):
data = address
def setbss(dir, address):
bss = address
def setstack(dir, address):
stack = address
def setrambase(dir, address):
global rambase
rambase = string.atol(address,0)
def setlinuxbiosbase(dir, address):
linuxbiosbase = address
global linuxbiosbase
linuxbiosbase = string.atol(address,0)
list_vals = {
# 'option': []
@ -275,6 +292,7 @@ command_vals = {
}
command_actions = {
'arch' : set_arch,
'TOP' : top,
'target' : target,
'mainboard' : mainboard,
@ -295,9 +313,7 @@ command_actions = {
'addaction' : addaction,
'option' : option,
'nooption' : nooption,
'data' : setdata,
'bss' : setbss,
'stack' : setstack,
'rambase': setrambase,
'biosbase' : setlinuxbiosbase,
'commandline' : commandline
}
@ -307,7 +323,7 @@ makeobjects = [];
def readfile(filename):
# open file, extract lines, and close
if not os.path.isfile(filename):
print config_file, "is not a file \n"
print filename, "is not a file \n"
sys.exit()
fileobject = open(filename, "r")
filelines = fileobject.readlines()
@ -336,6 +352,9 @@ def doconfigfile(dir, filename):
verb = command.group(1)
args = command.group(3)
if ((arch == '') and (verb != 'arch')):
print "arch must be the first command not ", verb, "\n"
sys.exit()
if command_actions.has_key(verb):
command_actions[verb](dir, args)
elif list_vals.has_key(verb):
@ -346,7 +365,7 @@ def doconfigfile(dir, filename):
# output functions
# write crt0
def writep5crt0(path):
def writecrt0(path):
crt0filepath = os.path.join(path, "crt0.S")
raminitfiles = command_vals["raminit"]
paramfile = os.path.join(treetop, 'src/include',
@ -392,16 +411,15 @@ def writep5crt0(path):
# write ldscript
def writeldscript(path):
global rambase, linuxbiosbase
ldfilepath = os.path.join(path, "ldscript.ld")
print "Trying to create ", ldfilepath
# try:
file = open(ldfilepath, 'w+')
# print out the ldscript rules
# print out the values of defined variables
file.write('_PDATABASE = 0x%x;\n' % data)
file.write('_RAMBASE = 0x%x;\n' % bss)
file.write('_KERNSTK = 0x%x;\n' % stack)
file.write('_ROMBASE = 0x%x;\n' % linuxbiosbase)
file.write('_ROMBASE = 0x%lx;\n' % linuxbiosbase)
file.write('_RAMBASE = 0x%lx;\n' % rambase)
ldlines = readfile(ldscriptbase)
if (debug):
@ -489,13 +507,13 @@ treetop = command_vals['TOP']
# set the default locations for config files
makebase = os.path.join(treetop, "util/config/make.base")
crt0base = os.path.join(treetop, "util/config/p5crt0.base")
ldscriptbase = os.path.join(treetop, "util/config/ldscript.base")
crt0base = os.path.join(treetop, "arch/i386/config/crt0.base")
ldscriptbase = os.path.join(treetop, "arch/alpha/config/ldscript.base")
# now read in the base files.
print "Now Process the base files"
print "Makebase is :", makebase, ":"
doconfigfile(treetop, makebase)
## now read in the base files.
#print "Now Process the base files"
#print "Makebase is :", makebase, ":"
#doconfigfile(treetop, makebase)
# now read in the customizing script
doconfigfile(treetop, sys.argv[1])
@ -507,4 +525,4 @@ doconfigfile(treetop, sys.argv[1])
writemakefile(outputdir)
writeldscript(outputdir)
writep5crt0(outputdir)
writecrt0(outputdir)