We now support l2 cache!
first cut at acer m1631 support.
This commit is contained in:
Ronald G. Minnich
parent
ab80324461
commit
8fa4c17322
3 changed files with 778 additions and 11 deletions
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@ -28,13 +28,10 @@
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* Intel Architecture Software Developer's Manual
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* Volume 3: System Programming
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*/
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#include <linux/config.h>
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/types.h>
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#include <asm/system.h>
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#include <asm/processor.h>
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#include <asm/msr.h>
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#include <cpu/p6/msr.h>
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#include <cpu/p6/mtrr.h>
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#include <cpu/p5/cpuid.h>
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#include <printk.h>
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/* Include debugging code and outputs */
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#define DEBUG
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@ -95,7 +92,7 @@ int intel_l2_configure()
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int signature, tmp;
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int cache_size;
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cpuid(0, &eax, &ebx, &ecx, &edx);
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intel_cpuid(0, &eax, &ebx, &ecx, &edx);
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if (ebx != 0x756e6547 ||
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edx != 0x49656e69 ||
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@ -105,7 +102,7 @@ int intel_l2_configure()
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return -1;
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}
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cpuid(1, &eax, &ebx, &ecx, &edx);
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intel_cpuid(1, &eax, &ebx, &ecx, &edx);
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/* Mask out the stepping */
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signature = eax & 0xfff0;
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@ -591,7 +588,7 @@ static int calculate_l2_latency(void)
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else
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return -1;
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cpuid(1, &eax, &ebx, &ecx, &edx);
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intel_cpuid(1, &eax, &ebx, &ecx, &edx);
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/* Mask out Model/Type */
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eax &= 0xfff0;
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@ -1 +1,768 @@
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/***
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*** sungeun
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***
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***/
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/***
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/*** BEGIN TABLES
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***/
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dram_temp :
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.byte 0x6c
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.byte 0x70
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.byte 0x74
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.byte 0x78
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ma_table:
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.long 0x04000000
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.byte 0b0100
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.long 0x00002000
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.byte 0b0011
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.long 0x00001000
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.byte 0b0010
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.long 0x00000800
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.byte 0b0001
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.long 0x00000200
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.byte 0b0000
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vc_ma_table:
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.long 0x00000200
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.byte 0b0010
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.long 0x00000100
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.byte 0b0001
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.long 0x00000200
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.byte 0b0010
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.long 0x00000100
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.byte 0b0001
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.long 0x00000080
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.byte 0b0000
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sizing_table:
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.long 0x02000000,0x00200000
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.byte 4
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.byte 5
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.long 0x04000000,0x00200000
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.byte 5
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.byte 6
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.long 0x08000000,0x00200000
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.byte 5
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.byte 0
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.long 0x08000000,0x00800000
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.byte 3
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.byte 0
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.long 0x08000000,0x04000000
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.byte 1
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.byte 0
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memory_size:
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.byte 0b0000
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.byte 0b0001
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.byte 0b0010
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.byte 0b0011
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.byte 0b0100
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.byte 0b0101
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.byte 0b0111
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internal_bank_tbl:
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.long 0x1000
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.long 0x2000
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.long 0x4000
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/***
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*** END TABLES
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***/
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/***
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*** BEGIN MACROS
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***/
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#define cmos_data_in \
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out %al,$0x70 ; \
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in $0x71,%al
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#define pci_write_byte \
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mov $0x80000000,%edx ; \
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or %ax,%dx ; \
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mov %edx,%eax ; \
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shl $16,%edx ; \
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mov $0x0cf8,%dx ; \
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and $0x0fc,%al ; \
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out %eax,%dx ; \
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shr $16,%edx ; \
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mov %dl,%al ; \
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and $3,%al ; \
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mov $0x0cfc,%dx ; \
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add %dl,%al ; \
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mov %cl,%al ; \
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out %al,%dx
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#define pci_read_byte \
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mov $0x80000000,%edx ; \
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or %dx,%ax ; \
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mov %edx,%eax ; \
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shl $16,%edx ; \
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mov $0x0cf8,%dx ; \
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and $0x0fc,%al ; \
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out %eax,%dx ; \
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shr $16,%edx ; \
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mov %dl,%al ; \
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and $3,%al ; \
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mov $0x0cfc,%dx ; \
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add %al,%dl ; \
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in %dx,%al
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#define pci_write_dword \
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mov $0,%ah ; \
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mov $0x80000000,%edx ; \
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or %ax,%dx ; \
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mov %edx,%eax ; \
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mov $0x0cf8,%dx ; \
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out %eax,%dx ; \
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mov $0x0fc,%dl ; \
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mov %edi,%eax ; \
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out %eax,%dx
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#define pci_read_dword \
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mov $0,%ah ; \
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mov $0x80000000,%edx ; \
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or %ax,%dx ; \
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mov %edx,%eax ; \
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mov $0x0cf8,%dx ; \
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out %eax,%dx ; \
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mov $0x0fc,%dl ; \
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in %dx,%eax
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#define save_dram_type \
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mov %sp,%di ; \
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mov %si,%ax ; \
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subw $dram_temp, %ax ; \
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mov $2,%dl ; \
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mul %dl ; \
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add $0x94,%ax ; \
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test $0x10,%ch ; \
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jnz 9f ; \
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add %ch,%al ; \
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pci_write_byte ; \
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jmp 8f ; \
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9: ; \
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and $0x0f,%ch ; \
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add $0xc,%al ; \
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pci_read_byte ; \
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8: ; \
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mov %di,%sp
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#define set_no_dram \
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mov %sp,%di ; \
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mov $0x00,%cx ; \
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rol $16,%edi ; \
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save_dram_type ; \
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mov $0x0100,%cx ; \
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save_dram_type ; \
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ror $16,%edi ; \
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mov (%esi),%al ; \
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add $3,%al ; \
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pci_read_byte ; \
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and $0b11100111,%al ; \
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mov %al,%cl ; \
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mov (%esi),%al ; \
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add $3,%al ; \
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pci_write_byte ; \
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mov %di,%sp
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#define memory_error \
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mov %sp,%di ; \
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mov $0,%ch ; \
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test $0x10000,%ebx ; \
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jnz 7f ; \
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mov $0x01,%ch ; \
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7: ; \
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mov $0x00,%cl ; \
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rol $16,%edi ; \
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save_dram_type ; \
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ror $16,%edi ; \
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mov %di,%sp
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#define pci_read_write_byte \
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mov %al,%bh ; \
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mov %sp,%di ; \
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pci_read_byte ; \
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and %ch,%al ; \
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or %cl,%al ; \
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mov %al,%cl ; \
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mov %bh,%al ; \
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pci_write_byte ; \
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mov %di,%sp
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#define DETECT_DRAM_TYPE \
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;; \
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movl $0x055555555,%es:(0x0) ; \
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movl $0x0aaaaaaaa,%es:(0x8) ; \
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cmpl $0x55555555,%es:(0) ; \
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jnz detect_sdram ; \
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cmpl $0x0aaaaaaaa,%es:(8) ; \
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jnz detect_sdram ; \
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mov $0x01,%cx ; \
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test $0x10000,%ebx ; \
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jnz 1f ; \
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mov $0x01,%ch ; \
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1: ; \
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save_dram_type ; \
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jmp dram_type_detect_end ; \
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detect_sdram: ; \
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mov $0x7e,%ax ; \
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mov (0b11110111 << 8)+0b00000000, %cx ; \
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pci_read_write_byte ; \
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mov (%esi),%al ; \
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mov %al,%ah ; \
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mov $0x42,%al ; \
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cmos_data_in ; \
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test $0b00010000,%al ; \
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mov %ah,%al ; \
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jz cas_2 ; \
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mov (%esi),%al ; \
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pci_write_dword ; \
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mov %eax,%edi ; \
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and $0x00000fffc,%edi ; \
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test $0x010000,%ebx ; \
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jz 1f ; \
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or $0x0f6640000,%edi ; \
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jmp configure_sdram_type ; \
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1: ; \
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or $0x0f1e40000,%edi ; \
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jmp configure_sdram_type ; \
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cas_2: ; \
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mov (%esi),%al ; \
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pci_write_dword ; \
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mov %eax,%edi ; \
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and $0x00000fffc,%edi ; \
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test $0x010000,%ebx ; \
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jz 1f ; \
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or $0x0d6640000,%edi ; \
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jmp configure_sdram_type ; \
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1: ; \
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or $0x0d1e40000,%edi ; \
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configure_sdram_type: ; \
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mov (%esi),%al ; \
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pci_read_dword ; \
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mov $1000,%ax ; \
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1: ; \
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dec %ax ; \
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jnz 1b ; \
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movl $0x055555555,%es:(0x0) ; \
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movl $0x0aaaaaaaa,%es:(0x8) ; \
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cmpl $0x055555555,%es:(0x0) ; \
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jnz chk_vc_sdram_type ; \
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cmpl $0x0aaaaaaaa,%es:(0x8) ; \
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jnz chk_vc_sdram_type ; \
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mov $0x02,%cx ; \
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test $0x10000,%ebx ; \
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jnz 1f ; \
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mov $01,%ch ; \
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1: ; \
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save_dram_type ; \
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jmp dram_type_detect_end ; \
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chk_vc_sdram_type: ; \
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mov (%esi),%al ; \
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pci_write_dword ; \
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mov %eax,%edi ; \
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and $0x0e7ffffff,%edi ; \
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mov (%esi),%al ; \
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pci_read_dword ; \
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mov $0x7e,%ax ; \
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mov (0b11110111 << 8)+0b00000000,%cx ; \
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pci_read_write_byte ; \
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mov (%esi),%al ; \
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pci_write_dword ; \
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mov %eax,%edi ; \
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mov (%esi),%al ; \
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test $0x010000,%ebx ; \
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jz 1f ; \
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and $0x00000d7f0,%edi ; \
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or $0x0fe620000,%edi ; \
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jmp configure_vc_sdram_type ; \
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1: ; \
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and $0x00000d7f0,%edi ; \
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or $0x0f9e20000,%edi ; \
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configure_vc_sdram_type: ; \
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mov (%esi),%al ; \
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pci_read_dword ; \
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mov $1000,%ax ; \
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1: ; \
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dec %ax ; \
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jnz 1b ; \
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movl $0x055555555,%es:(0x0) ; \
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movl $0x0aaaaaaaa,%es:(0x8) ; \
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cmpl $0x055555555,%es:(0x0) ; \
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jnz no_dram ; \
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cmpl $0x0aaaaaaaa,%es:(0x8) ; \
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jnz no_dram ; \
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mov $0x03,%cx ; \
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test $0x10000,%ebx ; \
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jnz 1f ; \
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mov $0x01,%ch ; \
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1: ; \
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save_dram_type ; \
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jmp dram_type_detect_end ; \
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no_dram: ; \
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memory_error ; \
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test $0x10000,%ebx ; \
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jnz prepare_next_detect ; \
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dram_type_detect_end: ; \
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#define MA_DETECT \
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;; \
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test $0x40000,%ebx ; \
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jnz vc_sdram_table ; \
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movw $ma_table, %si
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jmp detect_ma ; \
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vc_sdram_table: ; \
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movw $vc_ma_table,%si
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detect_ma: ; \
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add %ax,%si ; \
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mov (%esi),%edx ; \
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mov %edx,%esi ; \
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movl $0x055555555,(%esi); \
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movl $0x0aaaaaaaa,(%esi) ; \
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cmpl $0x055555555,%esi; \
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jz 1f ; \
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jmp ma_detect_end ; \
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1: ; \
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movw $ma_table,%si ; \
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add %ax,%si ; \
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mov $ma_table+4,%dl ; \
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test $0x10000,%ebx ; \
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jz 1f ; \
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xor %ecx,%ecx ; \
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mov %dl,%cl ; \
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shl $16,%ecx ; \
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jmp memory_sizing_sub ; \
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;; \
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1: ; \
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ror $20,%ecx ; \
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mov %dl,%cl ; \
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rol $20,%ecx ; \
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jmp memory_sizing_sub ; \
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ma_detect_end: ; \
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#define CHECK_SUB \
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test $0x10000,%ebx ; \
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jnz 1f ; \
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mov %bx,%ax ; \
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and $0x03f,%ax ; \
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mov %al,%ah ; \
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and $0x07,%al ; \
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shr $3,%ah ; \
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cmp %al,%ah ; \
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jz 2f ; \
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set_no_dram ; \
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jmp 1f ; \
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2: ; \
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shr $16,%ecx ; \
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mov %cx,%ax ; \
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and $0x0ff,%ax ; \
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mov %al,%ah ; \
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and $0x0f,%al ; \
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shr $4,%ah ; \
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cmp %al,%ah ; \
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jz 1f ; \
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set_no_dram ; \
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1:
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#define A_SUB \
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mov $0x10,%ch ; \
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save_dram_type ; \
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mov %al,%cl ; \
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mov $0x11,%ch ; \
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save_dram_type ; \
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mov %al,%ch ; \
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mov %cx,%ax ; \
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cmp $0x00,%al ; \
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jz no_sdram ; \
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cmp %ah,%al ; \
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jz a_sub_end ; \
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cmp $0x00,%ah ; \
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jnz no_sdram ; \
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mov (%esi),%al ; \
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pci_write_dword ; \
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mov %eax,%edi ; \
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and $0x00000ffff,%edi ; \
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mov $0x042,%al ; \
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cmos_data_in ; \
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test $0b00010000,%al ; \
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jz cas_l_2 ; \
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or $0x0e6000000,%edi ; \
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jmp set_cas_end ; \
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cas_l_2: ; \
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or $0x0c6000000,%edi ; \
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set_cas_end: ; \
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ror $27,%edi ; \
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and $0x0ff,%cx ; \
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or %cx,%di ; \
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rol $7,%edi ; \
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shr $3,%bx ; \
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and $0x07,%bx ; \
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or %bx,%di ; \
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rol $20,%edi ; \
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and $0x0000f0000,%ecx ; \
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or %ecx,%edi ; \
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test $0x80000,%ebx ; \
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jz set_single ; \
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or $1,%edi ; \
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set_single: ; \
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mov (%esi),%al ; \
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pci_read_dword ; \
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jmp detect_block_again_end ; \
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no_sdram: ; \
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set_no_dram ; \
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jmp detect_block_again_end ; \
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a_sub_end:
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#define bank_number \
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and (~0x80000),%ebx ; \
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test $0x40000,%ebx ; \
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jnz configure_internal_bank_end ; \
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mov %cx,%di ; \
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mov (%esi),%al ; \
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add $1,%al ; \
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pci_read_byte ; \
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and $0x0ef,%al ; \
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mov %al,%cl ; \
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mov (%esi),%al ; \
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add $1,%al ; \
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pci_write_byte ; \
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mov (%esi),%al ; \
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pci_read_byte ; \
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and $0x0fc,%al ; \
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or $1,%al ; \
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mov %al,%cl ; \
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mov (%esi),%al ; \
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pci_write_byte ; \
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mov %di,%cx ; \
|
||||
test $0x10000,%ebx ; \
|
||||
jz 1f ; \
|
||||
ror $16,%ecx ; \
|
||||
jmp what_memory_ma ; \
|
||||
1: ; \
|
||||
ror $20,%ecx ; \
|
||||
what_memory_ma: ; \
|
||||
movl $0x055555555,%es:(0x0) ; \
|
||||
mov %cx,%ax ; \
|
||||
test $0x10000,%ebx ; \
|
||||
rol $16,%ecx ; \
|
||||
jnz 1f ; \
|
||||
rol $4,%ecx ; \
|
||||
1: ; \
|
||||
and $0x0f,%ax ; \
|
||||
mov $4,%dl ; \
|
||||
mul %dl ; \
|
||||
mov %si,%di ; \
|
||||
movw $internal_bank_tbl, %si ; \
|
||||
add %ax,%si ; \
|
||||
movl (%esi),%edx ; \
|
||||
mov %edx,%esi ; \
|
||||
movl $0x0aaaaaaaa,(%esi) ; \
|
||||
cmpl $0x055555555,%es:(0x0) ; \
|
||||
mov %di,%si ; \
|
||||
jz i_4_bank ; \
|
||||
mov %cx,%di ; \
|
||||
mov (%esi),%al ; \
|
||||
pci_read_byte ; \
|
||||
and $0x0fc,%al ; \
|
||||
mov %al,%cl ; \
|
||||
mov (%esi),%al ; \
|
||||
pci_write_byte ; \
|
||||
mov %di,%cx ; \
|
||||
i_4_bank: ; \
|
||||
or $0x80000,%ebx ; \
|
||||
configure_internal_bank_end:
|
||||
|
||||
|
||||
|
||||
#define MEMORY_SIZING \
|
||||
mov %si,%di ; \
|
||||
mov $10,%eax ; \
|
||||
mov %cl,%dl ; \
|
||||
and $0x0f,%dl ; \
|
||||
mul %dl ; \
|
||||
movw $sizing_table,%si ; \
|
||||
addw %ax,%si ; \
|
||||
mov $sizing_table+8,%dl ; \
|
||||
mov $sizing_table+8,%dh ; \
|
||||
ror $16,%edx ; \
|
||||
mov $sizing_table+9,%dl ; \
|
||||
rol $16,%edx ; \
|
||||
mov %esi,%eax ; \
|
||||
mov %eax,%esi ; \
|
||||
memory_sizing_loop: ; \
|
||||
cmp %dl,%dh ; \
|
||||
jz 1f ; \
|
||||
cmpl $0x0aaaaaaaa,%es:(0) ; \
|
||||
jz 1f ; \
|
||||
memory_error ; \
|
||||
mov %di,%si ; \
|
||||
jmp prepare_next_detect ; \
|
||||
1: ; \
|
||||
movl $0x55555555,%es:(0) ; \
|
||||
movl $0x0aaaaaaaa,%es:(%esi) ; \
|
||||
cmpl $0x55555555,%es:(0) ; \
|
||||
jz determine_size ; \
|
||||
cmp $0,%dl ; \
|
||||
jnz 1f ; \
|
||||
memory_error ; \
|
||||
mov %di,%si ; \
|
||||
jmp prepare_next_detect ; \
|
||||
1: ; \
|
||||
dec %dl ; \
|
||||
ror $16,%edx ; \
|
||||
mov %dl,%al ; \
|
||||
rol $16,%edx ; \
|
||||
cmp %al,%dl ; \
|
||||
jnz 1f ; \
|
||||
shr $1,%esi ; \
|
||||
1: ; \
|
||||
shr $1,%esi ; \
|
||||
jmp memory_sizing_loop ; \
|
||||
determine_size: ; \
|
||||
sub %dl,%dh ; \
|
||||
cmp $2,%dh ; \
|
||||
jae 1f ; \
|
||||
or $0x20000,%ebx ; \
|
||||
1: ; \
|
||||
xor %dx,%dx ; \
|
||||
find_memory_size_offset: ; \
|
||||
cmp $0x00200000,%esi ; \
|
||||
jz 1f ; \
|
||||
shr $1,%esi ; \
|
||||
inc %dx ; \
|
||||
jmp find_memory_size_offset ; \
|
||||
1: ; \
|
||||
movw $memory_size,%si ; \
|
||||
addw %dx,%si ; \
|
||||
mov $0,%dx ; \
|
||||
orb $memory_size,%dl ; \
|
||||
or %dx,%bx ; \
|
||||
mov %di,%si ; \
|
||||
test $0x10000,%ebx ; \
|
||||
jz second_bank_number ; \
|
||||
mov $0x10,%ch ; \
|
||||
jmp read_dram_type ; \
|
||||
second_bank_number: ; \
|
||||
mov $0x11,%ch ; \
|
||||
read_dram_type: ; \
|
||||
save_dram_type ; \
|
||||
cmp $0x01,%al ; \
|
||||
jz EDO_T ; \
|
||||
cmp $0x00,%al ; \
|
||||
jz EDO_T ; \
|
||||
cmp $0x02,%al ; \
|
||||
jz determine_bank_number ; \
|
||||
or $0x40000,%ebx ; \
|
||||
determine_bank_number: ; \
|
||||
bank_number ; \
|
||||
EDO_T: ; \
|
||||
and (~0x20000),%ebx ; \
|
||||
and (~0x40000),%ebx ; \
|
||||
|
||||
|
||||
#define DISABLE_BLOCK \
|
||||
mov (%esi),%al ; \
|
||||
pci_write_dword ; \
|
||||
and $0x0f87fffff,%eax ; \
|
||||
xor %di,%di ; \
|
||||
mov %eax,%edi ; \
|
||||
mov (%esi),%al ; \
|
||||
pci_read_dword
|
||||
|
||||
|
||||
|
||||
#define CONFIGURE_MEMORY \
|
||||
movw $dram_temp,%si ; \
|
||||
mov (%esi),%dl ; \
|
||||
mov $0x094,%bl ; \
|
||||
configure_next: ; \
|
||||
xor %edi,%edi ; \
|
||||
mov %bl,%al ; \
|
||||
pci_read_byte ; \
|
||||
cmp $0x00,%al ; \
|
||||
jz 1f ; \
|
||||
or $0x3,%di ; \
|
||||
1: ; \
|
||||
shl $2,%di ; \
|
||||
inc %bl ; \
|
||||
mov %bl,%al ; \
|
||||
pci_read_byte ; \
|
||||
inc %bl ; \
|
||||
cmp $0x00,%al ; \
|
||||
jz 1f ; \
|
||||
or $0x03,%di ; \
|
||||
1: ; \
|
||||
mov (%esi),%al ; \
|
||||
pci_write_dword ; \
|
||||
and $0x0f87fffff,%eax ; \
|
||||
shl $23,%edi ; \
|
||||
or %edi,%eax ; \
|
||||
mov %eax,%edi ; \
|
||||
mov (%esi),%al ; \
|
||||
pci_read_dword ; \
|
||||
inc %si ; \
|
||||
cmpb $0x78,(%esi) ; \
|
||||
jnz configure_next
|
||||
|
||||
/***
|
||||
*** END MACROS
|
||||
***/
|
||||
|
||||
|
||||
/***
|
||||
/*** START REAL STUFF
|
||||
***/
|
||||
mov $0x81,%ax
|
||||
mov (0b01111111 << 8)+0b00000000,%cx
|
||||
pci_read_write_byte
|
||||
mov $0x82,%ax
|
||||
mov (0b11111111 << 8)+0b00010000,%cx
|
||||
pci_read_write_byte
|
||||
mov $0x84,%ax
|
||||
mov (0b11111110 << 8)+0b00000000,%cx
|
||||
pci_read_write_byte
|
||||
|
||||
movw $dram_temp,%si
|
||||
xor %ecx,%ecx
|
||||
xor %ebx,%ebx
|
||||
detect_block_again:
|
||||
|
||||
or $0x10000,%ebx
|
||||
xor %bx,%bx
|
||||
mov (%esi),%al
|
||||
add $3,%al
|
||||
mov %cx,%di
|
||||
mov $0x0ee,%cl
|
||||
pci_write_byte
|
||||
mov (%esi),%al
|
||||
add $2,%al
|
||||
mov $0x064,%cl
|
||||
pci_write_byte
|
||||
mov %di,%cx
|
||||
jmp detect_ma_size
|
||||
odd_bank_detect:
|
||||
shl $3,%bx
|
||||
and (~0x10000),%ebx
|
||||
mov (%esi),%al
|
||||
add $3,%al
|
||||
mov $0x0e9,%cl
|
||||
pci_write_byte
|
||||
mov (%esi),%al
|
||||
add $2,%al
|
||||
mov $0x0e4,%cl
|
||||
pci_write_byte
|
||||
detect_ma_size:
|
||||
DETECT_DRAM_TYPE
|
||||
test $0x10000,%ebx
|
||||
jnz 1f
|
||||
A_SUB
|
||||
1:
|
||||
mov $0x10,%ch
|
||||
save_dram_type
|
||||
mov %si,%di
|
||||
and $0x03,%ax
|
||||
test $0x02,%ax
|
||||
jnz vcm_or_sdram
|
||||
mov $0,%ax
|
||||
jmp detect_ma_table
|
||||
vcm_or_sdram:
|
||||
test $0x01,%ax
|
||||
jnz vcm_ma_type_set
|
||||
mov $10,%ax
|
||||
jmp detect_ma_table
|
||||
vcm_ma_type_set:
|
||||
mov $10,%ax
|
||||
or $0x40000,%ebx
|
||||
detect_ma_table:
|
||||
MA_DETECT
|
||||
add $5,%ax
|
||||
cmp $25,%ax
|
||||
jz 1f
|
||||
jmp detect_ma_table
|
||||
1:
|
||||
and (~0x40000),%ebx
|
||||
mov %di,%si
|
||||
mov $0x10,%ch
|
||||
test $0x10000,%ebx
|
||||
jnz 1f
|
||||
mov $0x11,%ch
|
||||
1:
|
||||
save_dram_type
|
||||
memory_sizing_sub:
|
||||
mov %di,%si
|
||||
test $0x10000,%ebx
|
||||
jz 1f
|
||||
mov %ecx,%eax
|
||||
shr $16,%eax
|
||||
mov %al,%cl
|
||||
jmp configure_ma
|
||||
1:
|
||||
mov %ecx,%eax
|
||||
shr $20,%eax
|
||||
mov %al,%cl
|
||||
configure_ma:
|
||||
mov (%esi),%al
|
||||
add $2,%al
|
||||
pci_read_byte
|
||||
and $0x0f0,%al
|
||||
and $0x0f,%cl
|
||||
or %cl,%al
|
||||
mov %al,%cl
|
||||
mov (%esi),%al
|
||||
add $2,%al
|
||||
pci_write_byte
|
||||
|
||||
MEMORY_SIZING
|
||||
|
||||
mov (%esi),%al
|
||||
add $2,%al
|
||||
mov %bx,%di
|
||||
pci_read_byte
|
||||
and $0x6,%di
|
||||
shl $4,%di
|
||||
and $0x8f,%al
|
||||
or %di,%ax
|
||||
mov %al,%cl
|
||||
mov (%esi),%al
|
||||
add $2,%al
|
||||
pci_write_byte
|
||||
CHECK_SUB
|
||||
prepare_next_detect:
|
||||
test $0x10000,%ebx
|
||||
jnz odd_bank_detect
|
||||
detect_block_again_end:
|
||||
DISABLE_BLOCK
|
||||
inc %si
|
||||
cmpb $0x078,(%esi)
|
||||
jz configure_memory_block
|
||||
jmp detect_block_again
|
||||
configure_memory_block:
|
||||
CONFIGURE_MEMORY
|
||||
mov $0x7e,%ax
|
||||
mov (0b11110111 << 8)+0b00000000,%cx
|
||||
pci_read_write_byte
|
||||
mov $1000,%ax
|
||||
1:
|
||||
dec %ax
|
||||
jnz 1b
|
||||
mov $0x7e,%ax
|
||||
mov (0x11111111 << 8)+0x00001000,%cx
|
||||
pci_read_write_byte
|
||||
|
||||
/***
|
||||
*** END REAL STUFF
|
||||
****/
|
||||
|
|
|
|||
|
|
@ -954,4 +954,7 @@ ram_set_spd_registers:
|
|||
#endif
|
||||
RET_LABEL(ram_set_spd_registers)
|
||||
|
||||
/* things that are not used */
|
||||
#define FIRST_NORMAL_REFERENCE()
|
||||
#define SPECIAL_FINISHUP()
|
||||
intel_440_out:
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue