coreboot/src
Nicholas Sudsgaard cbf8527345 device/azalia: Amend the mistake of codec_is_operative()
One of my previous commits attempted to simplify azalia_codec_init(),
but resulted in illogical code which also introduced a bug in certain
cases.

To summarize, codec_is_operative() tells the controller to get the
vendor ID of a specific codec. While doing so, this also checks how the
controller and codec respond to see if they are functioning. However, we
read the response in azalia_codec_init(). Therefore, these functions
must be called sequentially in order to initialize the codecs correctly.

In certain cases, we would attempt to read the response without
requesting the vendor ID in the first place. This possibly caused
these verbs to not get loaded at all.

These are the areas affected by the bug:
 - northbridge/intel/haswell/minihd.c
 - soc/intel/broadwell/minihd.c

TEST=Verbs were loaded on HP ProBook 450 G3

Fixes: 516d05f43d ("device/azalia: Separate codec checking and initialization")

Change-Id: I82ada9e6eca0539b854b5bc61f6f7a88ffd1cdc5
Signed-off-by: Nicholas Sudsgaard <devel+coreboot@nsudsgaard.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/88918
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Reviewed-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2025-08-30 13:52:42 +00:00
..
acpi drivers/crb/tpm: Add new method to retrieve base address 2025-07-02 16:15:09 +00:00
arch soc/power9/rom_media.c: find CBFS in PNOR 2025-08-28 20:14:01 +00:00
commonlib commonlib/device_tree: Fix memory leak in fdt_unflatten() 2025-08-29 09:10:27 +00:00
console
cpu cpu/x86/mp_init: Refactor ICR wait logic 2025-08-19 20:56:58 +00:00
device device/azalia: Amend the mistake of codec_is_operative() 2025-08-30 13:52:42 +00:00
drivers drivers/intel/fsp2_0: Refactor for earlier graphics memory WC MTRR 2025-08-29 04:33:07 +00:00
ec ec/starlabs/merlin: Add a "off" mode for the power LED 2025-08-24 20:23:40 +00:00
include device/azalia: Add enums for HDA verb and parameter IDs 2025-08-30 13:52:18 +00:00
lib src/lib/cbmem_common: Delete a space(' ') in the source code 2025-08-28 20:13:34 +00:00
mainboard mb/siemens/mc_rpl1: Enable 4 P-Cores, disable E-Cores 2025-08-30 13:51:04 +00:00
northbridge nb/intel/sandybridge/northbridge.c: Disable non-active PEG devices 2025-08-28 20:08:17 +00:00
sbom sbom: Fix build with merged bootblock and romstage 2025-07-07 14:29:29 +00:00
security security/vboot: Back up CMOS data later boot phase 2025-06-05 13:36:19 +00:00
soc soc/intel/alderlake: Add 28W TDP support for RPL-P ID 8 (0xa716) 2025-08-30 13:51:39 +00:00
southbridge sb/intel/bd82x6x: Fix replay issues 2025-08-30 12:02:18 +00:00
superio src/superio/nuvoton: Add HWM initialization code 2025-06-11 13:31:25 +00:00
vendorcode vc/intel/fsp: Update PTL FSP headers to FSP 3272_04 2025-08-19 11:29:21 +00:00
Kconfig security/vboot: Back up CMOS data later boot phase 2025-06-05 13:36:19 +00:00