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nb/intel/sandybridge/northbridge.c: Disable non-active PEG devices

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TXT SINIT ACM checks the PEG bridge memory ranges whether they are
correctly assigned in the MMIO space. If the bridge is enabled but no
device is attached to it, coreboot will not assign any resources (if
hotplug is not enabled). When SINIT ACM checks the ranges, it fails
on prefetchable range check.

Hide the PEG devices if the bridge is not active. PCIe bridges should
generally be hidden if hotplug is not enabled and there is no
downstream device.

TEST=Perform successful measured launch of Xen with Intel TXT on Dell
OptiPlex 9010.

Change-Id: I0bd104ab416376e96102738f2e47c8ce041497a2
Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/87472
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Alicja Michalska <ahplka19@gmail.com>
This commit is contained in:
Michał Żygowski 2025-04-26 20:07:08 +02:00 • committed by Matt DeVillier
commit 482a2d6548
1 changed files with 4 additions and 4 deletions
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8
src/northbridge/intel/sandybridge/northbridge.c
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@ -267,17 +267,17 @@ static void disable_peg(void)
reg = pci_read_config32(dev, DEVEN);
dev = pcidev_on_root(1, 2);
if (!dev || !dev->enabled) {
if (!dev_is_active_bridge(dev)) {
printk(BIOS_DEBUG, "Disabling PEG12.\n");
reg &= ~DEVEN_PEG12;
}
dev = pcidev_on_root(1, 1);
if (!dev || !dev->enabled) {
if (!dev_is_active_bridge(dev)) {
printk(BIOS_DEBUG, "Disabling PEG11.\n");
reg &= ~DEVEN_PEG11;
}
dev = pcidev_on_root(1, 0);
if (!dev || !dev->enabled) {
if (!dev_is_active_bridge(dev)) {
printk(BIOS_DEBUG, "Disabling PEG10.\n");
reg &= ~DEVEN_PEG10;
}
@ -292,7 +292,7 @@ static void disable_peg(void)
reg &= ~DEVEN_D4EN;
}
dev = pcidev_on_root(6, 0);
if (!dev || !dev->enabled) {
if (!dev_is_active_bridge(dev)) {
printk(BIOS_DEBUG, "Disabling PEG60.\n");
reg &= ~DEVEN_PEG60;
}