coreboot/src
Kilian Krause bf0ee592f5 soc/intel/alderlake: Make SATA speed limit configurable
Add support for limiting SATA interface speed through the FSP parameter
'SataSpeedLimit'. This is useful for mainboards with physical design
constraints that require operating at lower speeds than what the
controller and drives support.

The implementation adds a new chip config option that mainboards can
set in their devicetree to control this behavior.

Change-Id: Ib0a058d006b752975c57851f2418a4e94b3bfcca
Signed-off-by: Kilian Krause <kilian.krause@siemens.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/88951
Reviewed-by: Jérémy Compostella <jeremy.compostella@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2025-08-28 20:09:02 +00:00
..
acpi drivers/crb/tpm: Add new method to retrieve base address 2025-07-02 16:15:09 +00:00
arch arch/x86/memcpy: Fix undefined behaviour 2025-08-19 20:55:24 +00:00
commonlib commonlib/include/commonlib: Add volatile qualifier 2025-07-22 16:30:38 +00:00
console console/i2c_smbus: Allow to send data w/o register offset 2024-07-11 00:06:22 +00:00
cpu cpu/x86/mp_init: Refactor ICR wait logic 2025-08-19 20:56:58 +00:00
device device/device_util: Fix format specifier for DEVICE_PATH_GICC_V3 2025-08-15 19:00:14 +00:00
drivers tree: Replace union {0} initializers with {} for C23 compliance 2025-08-11 16:40:34 +00:00
ec ec/starlabs/merlin: Add a "off" mode for the power LED 2025-08-24 20:23:40 +00:00
include include: Make DRAM an explicit region 2025-08-16 01:58:58 +00:00
lib lib: Correct logo bottom margin handling for all panel orientations 2025-08-23 03:12:43 +00:00
mainboard mb/erying/tgl: Introduce CFR 2025-08-28 19:11:13 +00:00
northbridge nb/intel/sandybridge/northbridge.c: Disable non-active PEG devices 2025-08-28 20:08:17 +00:00
sbom sbom: Fix build with merged bootblock and romstage 2025-07-07 14:29:29 +00:00
security security/vboot: Back up CMOS data later boot phase 2025-06-05 13:36:19 +00:00
soc soc/intel/alderlake: Make SATA speed limit configurable 2025-08-28 20:09:02 +00:00
southbridge sb/intel/common/smbus: Use proper delay instruction 2025-08-24 20:20:56 +00:00
superio src/superio/nuvoton: Add HWM initialization code 2025-06-11 13:31:25 +00:00
vendorcode vc/intel/fsp: Update PTL FSP headers to FSP 3272_04 2025-08-19 11:29:21 +00:00
Kconfig security/vboot: Back up CMOS data later boot phase 2025-06-05 13:36:19 +00:00