Add a mapping for the Core 3 N350 SoC, which has a MCH with PCI DID 0x4617, 8 efficiency cores, and a 7W TDP. This eliminates an error when setting power limits due to the missing entry: [ERROR] unknown SA ID: 0x4617, skipped power limits configuration TEST=build/boot starlabs/starlite_adl with ADL-N Core 3 N350 SoC. Change-Id: Ibd701ec5589a9a023a5538f470ff234a23249b45 Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/88018 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Sean Rhodes <sean@starlabs.systems> Reviewed-by: Jérémy Compostella <jeremy.compostella@intel.com> |
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