Some SSDs block the CPU from reaching C10 during the S0ix suspend
without the RTD3 configuration. Add PCIe RTD3 support so NVMe gets
placed into D3 state when entering S0ix.
Enable and reset GPIOs are configured as per pin mapping in gpio.c.
BUG=b:391612392 b:421064225
TEST=Run suspend_stress_test on moxie and verify that the device
suspends to S0ix.
Change-Id: I6b2c264fd7244ab84e82919354afb2b49a22177a
Signed-off-by: David Wu <david_wu@quanta.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/88000
Reviewed-by: Subrata Banik <subratabanik@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Eric Lai <ericllai@google.com>
Reviewed-by: Pranava Y N <pranavayn@google.com>
b322d30944