erebion/coreboot
1
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity Actions

soc/intel/cannonlake: Add/use enums for IGD config

Browse source 
Add enums for the IGD aperture size and DVMT/stolen memory size, as is
done for newer SoCs. Use these enums rather than their int values
when configuring the IGD.

Change-Id: I369f9c73a00b41b056c89975d4c7e643f1e900c1
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/87625
Reviewed-by: Maxim Polyakov <max.senia.poliak@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jérémy Compostella <jeremy.compostella@intel.com>
This commit is contained in:
Matt DeVillier 2025-05-10 17:04:40 -05:00
commit 6f9df7ace4
3 changed files with 28 additions and 11 deletions
Download patch file Download diff file Expand all files Collapse all files

15
src/soc/intel/cannonlake/chip.h
View file

@ -36,6 +36,21 @@ enum chip_pl2_4_cfg {
value_not_set /* vr_config internal use only */
};
/* Gfx related */
enum igd_dvmt50_pre_alloc {
IGD_SM_0MB = 0x00,
IGD_SM_32MB = 0x01,
IGD_SM_64MB = 0x02,
IGD_SM_96MB = 0x03,
IGD_SM_128MB = 0x04,
};
enum igd_aperture_size {
IGD_AP_SZ_128MB = 0x00,
IGD_AP_SZ_256MB = 0x01,
IGD_AP_SZ_512MB = 0x02,
};
struct soc_intel_cannonlake_config {
/* Common struct containing soc config data required by common code */
struct soc_intel_common_config common_soc_config;

19
src/soc/intel/cannonlake/include/soc/cfr.h
View file

@ -8,6 +8,7 @@
#define CANNONLAKE_CFR_H
#include <drivers/option/cfr_frontend.h>
#include <soc/soc_chip.h>
/* FSP hyperthreading */
static const struct sm_object hyper_threading = SM_DECLARE_ENUM({
@ -26,11 +27,11 @@ static const struct sm_object igd_aperture = SM_DECLARE_ENUM({
.opt_name = "igd_aperture_size",
.ui_name = "IGD Aperture Size",
.ui_helptext = "Select the Aperture Size",
.default_value = 1,
.default_value = IGD_AP_SZ_256MB,
.values = (const struct sm_enum_value[]) {
{ "128 MB", 0 },
{ "256 MB", 1 },
{ "512 MB", 2 },
{ "128 MB", IGD_AP_SZ_128MB },
{ "256 MB", IGD_AP_SZ_256MB },
{ "512 MB", IGD_AP_SZ_512MB },
SM_ENUM_VALUE_END },
});
@ -39,12 +40,12 @@ static const struct sm_object igd_dvmt = SM_DECLARE_ENUM({
.opt_name = "igd_dvmt_prealloc",
.ui_name = "IGD DVMT Size",
.ui_helptext = "Size of memory preallocated for internal graphics",
.default_value = 2,
.default_value = IGD_SM_64MB,
.values = (const struct sm_enum_value[]) {
{ "32 MB", 1 },
{ "64 MB", 2 },
{ "96 MB", 3 },
{ "128 MB", 4 },
{ "32 MB", IGD_SM_32MB },
{ "64 MB", IGD_SM_64MB },
{ "96 MB", IGD_SM_96MB },
{ "128 MB", IGD_SM_128MB },
SM_ENUM_VALUE_END },
});

5
src/soc/intel/cannonlake/romstage/fsp_params.c
View file

@ -14,6 +14,7 @@
#include <soc/pci_devs.h>
#include <soc/pcie.h>
#include <soc/romstage.h>
#include <soc/soc_chip.h>
#include <types.h>
#include "../chip.h"
@ -37,8 +38,8 @@ void platform_fsp_memory_init_params_cb(FSPM_UPD *mupd, uint32_t version)
if (igd_on && pci_read_config16(SA_DEV_IGD, PCI_VENDOR_ID) != 0xffff) {
/* Set IGD stolen size to 64MB. */
m_cfg->InternalGfx = 1;
m_cfg->IgdDvmt50PreAlloc = get_uint_option("igd_dvmt_prealloc", 2);
m_cfg->ApertureSize = get_uint_option("igd_aperture_size", 1);
m_cfg->IgdDvmt50PreAlloc = get_uint_option("igd_dvmt_prealloc", IGD_SM_64MB);
m_cfg->ApertureSize = get_uint_option("igd_aperture_size", IGD_AP_SZ_256MB);
} else {
m_cfg->InternalGfx = 0;
m_cfg->IgdDvmt50PreAlloc = 0;