coreboot/src
Duncan Laurie a6b85ad950 baytrail: Add basic support for ACPI System Wake Source
This adds the very basic top-level support for determining the
system wake source from ACPI.  It only implements the _SWS method
in the _SB scope which just returns a bit index into the PM1
status register for the first fixed functional block.

This can be used to determine wake source of RTC or Power Button
but does not help determine wake source for USB or GPIO.

The ACPI spec says to return -1 if no source can be determined
from PM1 status register.

BUG=chrome-os-partner:8127
BRANCH=baytrail
TEST=build and boot on rambi

1) Test resume from S3 by RTC:
ACPI System Wake Source is PM1 Index 10
(bit 10 is RTC_STS in ACPI spec, ACPI_EVENT_RTC in kernel)

2) Test resume from S3 by power button:
ACPI System Wake Source is PM1 Index 8
(bit 8 is PWRBTN_STS in ACPI spec, ACPI_EVENT_POWER_BUTTON in kernel)

3) Test resume from S3 by USB:
ACPI System Wake Source is PM1 Index -1

Change-Id: Ifc5c0867f82cf291af157537b8c13fe44923d8f5
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/183333
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2014-01-22 23:36:46 +00:00
..
arch arm: Thumb ALL the things! 2014-01-14 03:29:48 +00:00
console ARM: Generalize armv7 as arm. 2013-10-02 09:18:44 +00:00
cpu cpu/intel: allow non-packaged scoped turbo setting 2014-01-15 04:52:13 +00:00
device pnp: Allow setting of misc register 0xf4 in device tree 2013-12-20 00:37:38 +00:00
drivers Haswell/falco/peppy/slippy: continue to clean up FUI. 2013-12-19 01:17:37 +00:00
ec chromeec: add function to reboot on unexpected image 2014-01-10 00:11:54 +00:00
include baytrail: snapshot power state in romstage 2014-01-09 20:15:55 +00:00
lib baytrail: snapshot power state in romstage 2014-01-09 20:15:55 +00:00
mainboard baytrail: Add a shared GNVS init function 2014-01-22 23:36:44 +00:00
northbridge peppy and falco: set panel power timings in northbridge, using devicetree, not mainboards 2013-12-23 08:55:32 +00:00
soc baytrail: Add basic support for ACPI System Wake Source 2014-01-22 23:36:46 +00:00
southbridge libpayload: find source of input characters 2014-01-19 04:15:03 +00:00
superio pnp: Allow setting of misc register 0xf4 in device tree 2013-12-20 00:37:38 +00:00
vendorcode chromeos: add VBOOT_REFCODE_INDEX option 2013-12-17 21:27:07 +00:00
Kconfig armv8: add support for armv8 cpu 2014-01-07 02:48:47 +00:00