pnp: Allow setting of misc register 0xf4 in device tree

BUG=chrome-os-partner:24066
TEST=boot tested on Panther
BRANCH=none

Change-Id: I602f970e0ee2fd634a74fd4c25358c2e78ca58f9
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: https://chromium-review.googlesource.com/179536
Commit-Queue: Stefan Reinauer <reinauer@chromium.org>
Tested-by: Stefan Reinauer <reinauer@chromium.org>
Reviewed-by: Shawn Nematbakhsh <shawnn@chromium.org>
This commit is contained in:
Stefan Reinauer 2013-12-11 11:06:08 -08:00 committed by chrome-internal-fetch
commit 02b0583e63
4 changed files with 10 additions and 2 deletions

View file

@ -269,6 +269,11 @@ static void get_resources(device_t dev, struct pnp_info *info)
resource->size = 1;
resource->flags |= IORESOURCE_IRQ;
}
if (info->flags & PNP_MSC4) {
resource = new_resource(dev, PNP_IDX_MSC4);
resource->size = 1;
resource->flags |= IORESOURCE_IRQ;
}
if (info->flags & PNP_MSC10) {
resource = new_resource(dev, PNP_IDX_MSC10);
resource->size = 1;

View file

@ -45,7 +45,8 @@ struct pnp_info {
#define PNP_EN 0x100
#define PNP_MSC0 0x200
#define PNP_MSC1 0x400
#define PNP_MSC10 0x800
#define PNP_MSC4 0x800
#define PNP_MSC10 0x1000
struct io_info io0, io1, io2, io3;
};
struct resource *pnp_get_resource(device_t dev, unsigned index);

View file

@ -12,6 +12,7 @@
#define PNP_IDX_DRQ1 0x75
#define PNP_IDX_MSC0 0xf0
#define PNP_IDX_MSC1 0xf1
#define PNP_IDX_MSC4 0xf4
#define PNP_IDX_MSC10 0xfa
#endif /* DEVICE_PNP_DEF_H */

View file

@ -224,7 +224,8 @@ static struct pnp_info pnp_dev_info[] = {
/* Serial Port 1 */
{ &ops, IT8772F_SP1, PNP_IO0 | PNP_IRQ0, {0x0ff8, 0}, },
/* Environmental Controller */
{ &ops, IT8772F_EC, PNP_IO0 | PNP_IO1 | PNP_IRQ0 | PNP_MSC10,
{ &ops, IT8772F_EC, PNP_IO0 | PNP_IO1 | PNP_IRQ0 |
PNP_MSC4 | PNP_MSC10,
{0x0ff8, 0}, {0x0ffc, 4}, },
/* KBC Keyboard */
{ &ops, IT8772F_KBCK, PNP_IO0 | PNP_IO1 | PNP_IRQ0,