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Jamie Chen 9f4132712f soc/intel/alderlake: add chipsetinit support 
Intel chipsetinit.bin is for PCH modphy initialize.
Add code to read chipsetinit.bin from CBFS and fill UPD params.

BUG=b:447290550
TEST=1. build coreboot
     2. check log to confirm load chipsetinit.bin successfully.

Change-Id: I65740f52c779daeea1a27a9e078336daee29cf3b
Signed-off-by: Jamie Chen <jamie.chen@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/90687
Reviewed-by: Simon Yang <simon1.yang@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kao, Ben <ben.kao@intel.com>
Reviewed-by: Jérémy Compostella <jeremy.compostella@intel.com>
2026-01-13 15:45:53 +00:00
..
acpi acpigen_ps2_keybd: map screenlock 2026-01-07 16:24:50 +00:00
arch include/cper.h: Update cper_ia32x64_context_t 2026-01-07 09:41:26 +00:00
commonlib commonlib/device_tree: Add dt_add_reserved_memory_region helper 2026-01-13 00:46:32 +00:00
console console: Fix flushing for slow consoles 2025-10-02 22:44:46 +00:00
cpu Makefile.mk,cpu/intel/fit/Makefile.mk: introduce CBFS_REGIONS 2025-12-20 17:39:22 +00:00
device device/Kconfig: Gate early libgfxinit default on ChromeOS 2026-01-01 17:14:14 +00:00
drivers drivers/smmstore: Use lookup_store() for memory-mapped reads 2026-01-10 21:46:55 +00:00
ec ec/starlabs/merlin: Reorganize Kconfig and guard options properly 2025-12-29 23:59:52 +00:00
include include/cpu/x86/msr.h: Add MCA related MSRs 2026-01-08 18:24:23 +00:00
lib coreboot_tables: Add new CBMEM ID to hold the PCI RB aperture info 2026-01-09 00:30:03 +00:00
mainboard mb/google/fatcat/var/ruby: Add wifi SAR table 2026-01-12 01:35:52 +00:00
northbridge device/dram/ddr3: Fill in voltage fields for SMBIOS type 17 2025-12-08 02:36:00 +00:00
sbom sbom: Fix build with merged bootblock and romstage 2025-07-07 14:29:29 +00:00
security include/cpu/x86/msr.h: Add MCA related MSRs 2026-01-08 18:24:23 +00:00
soc soc/intel/alderlake: add chipsetinit support 2026-01-13 15:45:53 +00:00
southbridge sb/intel/common/spi: Prevent transfers across 4KiB boundaries 2026-01-10 21:47:04 +00:00
superio sio/nuvoton/common: Refactor nuvoton_pnp_*_config_state() 2026-01-03 03:40:12 +00:00
vendorcode vc/intel/fsp/fsp2_0/pantherlake: Update PTL FSP headers to FSP 3442.07 2026-01-08 07:12:12 +00:00
Kconfig src/Kconfig: add MAINBOARD_NEEDS_CMOS_OPTIONS 2025-12-20 17:39:00 +00:00