sio/nuvoton/common: Refactor nuvoton_pnp_*_config_state()

Move the pair of non-ramstage Nuvoton SIO PNP config mode entry/exit
functions from early_serial.c into nuvoton.h as inline functions for
both pre-RAM and SMM code use. Availability is limited to
__SIMPLE_DEVICE__ environments, or if this symbol is defined such as
when mainboards specifically request it.

Cuts outdated comment from early_serial.c and transplant its key parts
to nuvoton.h.

Remove the temporarily refactored local copies from
mb/asrock/{z87_extreme4,fatal1ty_z87_professional}.

Build tested on these two Asrock boards and asus/p8x7x-series.

Change-Id: I0238f006dd86742f937e9dcd6134ed7be566677c
Signed-off-by: Keith Hui <buurin@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/90657
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
This commit is contained in:
Keith Hui 2025-12-28 21:40:13 -05:00 committed by Matt DeVillier
commit 573c37a518
6 changed files with 26 additions and 88 deletions

View file

@ -4,5 +4,3 @@ bootblock-y += bootblock.c
bootblock-y += gpio.c
romstage-y += gpio.c
ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += gma-mainboard.ads
smm-y += nuvoton.c
ramstage-y += nuvoton.c

View file

@ -1,24 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <device/pnp_ops.h>
#include <superio/nuvoton/common/nuvoton.h>
#include <superio/nuvoton/nct6776/nct6776.h>
#define NUVOTON_ENTRY_KEY 0x87
#define NUVOTON_EXIT_KEY 0xAA
/* Enable configuration: pass entry key '0x87' into index port dev
* two times. */
void nuvoton_pnp_enter_conf_state(pnp_devfn_t dev)
{
u16 port = dev >> 8;
outb(NUVOTON_ENTRY_KEY, port);
outb(NUVOTON_ENTRY_KEY, port);
}
/* Disable configuration: pass exit key '0xAA' into index port dev. */
void nuvoton_pnp_exit_conf_state(pnp_devfn_t dev)
{
u16 port = dev >> 8;
outb(NUVOTON_EXIT_KEY, port);
}

View file

@ -4,5 +4,3 @@ bootblock-y += bootblock.c
bootblock-y += gpio.c
romstage-y += gpio.c
ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += gma-mainboard.ads
ramstage-y += nuvoton.c
smm-y += nuvoton.c

View file

@ -1,24 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <device/pnp_ops.h>
#include <superio/nuvoton/common/nuvoton.h>
#include <superio/nuvoton/nct6776/nct6776.h>
#define NUVOTON_ENTRY_KEY 0x87
#define NUVOTON_EXIT_KEY 0xAA
/* Enable configuration: pass entry key '0x87' into index port dev
* two times. */
void nuvoton_pnp_enter_conf_state(pnp_devfn_t dev)
{
u16 port = dev >> 8;
outb(NUVOTON_ENTRY_KEY, port);
outb(NUVOTON_ENTRY_KEY, port);
}
/* Disable configuration: pass exit key '0xAA' into index port dev. */
void nuvoton_pnp_exit_conf_state(pnp_devfn_t dev)
{
u16 port = dev >> 8;
outb(NUVOTON_EXIT_KEY, port);
}

View file

@ -2,21 +2,6 @@
/*
* A generic romstage (pre-ram) driver for Nuvoton variant Super I/O chips.
*
* The following is derived directly from the vendor Nuvoton's data-sheets:
*
* To toggle between `configuration mode` and `normal operation mode` as to
* manipulate the various LDN's in Nuvoton Super I/O's we are required to
* pass magic numbers `passwords keys`.
*
* NUVOTON_ENTRY_KEY := enable configuration : 0x87
* NUVOTON_EXIT_KEY := disable configuration : 0xAA
*
* To modify a LDN's configuration register, we use the index port to select
* the index of the LDN and then write to the data port to alter the
* parameters. A default index, data port pair is 0x4E, 0x4F respectively, a
* user modified pair is 0x2E, 0x2F respectively.
*
*/
#include <arch/io.h>
@ -25,25 +10,6 @@
#include <stdint.h>
#include "nuvoton.h"
#define NUVOTON_ENTRY_KEY 0x87
#define NUVOTON_EXIT_KEY 0xAA
/* Enable configuration: pass entry key '0x87' into index port dev
* two times. */
void nuvoton_pnp_enter_conf_state(pnp_devfn_t dev)
{
u16 port = dev >> 8;
outb(NUVOTON_ENTRY_KEY, port);
outb(NUVOTON_ENTRY_KEY, port);
}
/* Disable configuration: pass exit key '0xAA' into index port dev. */
void nuvoton_pnp_exit_conf_state(pnp_devfn_t dev)
{
u16 port = dev >> 8;
outb(NUVOTON_EXIT_KEY, port);
}
/* Bring up early serial debugging output before the RAM is initialized. */
void nuvoton_enable_serial(pnp_devfn_t dev, u16 iobase)
{

View file

@ -7,8 +7,32 @@
#include <device/pnp_type.h>
#include <stdint.h>
void nuvoton_pnp_enter_conf_state(pnp_devfn_t dev);
void nuvoton_pnp_exit_conf_state(pnp_devfn_t dev);
#if ENV_PNP_SIMPLE_DEVICE
#include <device/pnp_ops.h>
/*
* To toggle between `configuration mode` and `normal operation mode` as to
* manipulate the various LDN's in Nuvoton Super I/O's we are required to
* pass magic numbers `passwords keys`.
*/
#define NUVOTON_ENTRY_KEY 0x87
#define NUVOTON_EXIT_KEY 0xAA
static __always_inline void nuvoton_pnp_enter_conf_state(pnp_devfn_t dev)
{
u16 port = dev >> 8;
outb(NUVOTON_ENTRY_KEY, port);
outb(NUVOTON_ENTRY_KEY, port);
}
static __always_inline void nuvoton_pnp_exit_conf_state(pnp_devfn_t dev)
{
u16 port = dev >> 8;
outb(NUVOTON_EXIT_KEY, port);
}
#endif /* SIMPLE_DEVICE */
void nuvoton_enable_serial(pnp_devfn_t dev, u16 iobase);
#endif