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Sowmya Aralguppe 95784dbafb mb/google/ocelot/var/ocelot: Add FW_CONFIG for Audio 
Add FW_CONFIG probe based on Ocelot for Audio device:
	1.HDA Interface
	2.SNDW Interface
	3.DMIC - 2

Schematic version: schematic_1433518
Platform Mapping Document : Rev0p86

BUG=b:394208231
TEST= Build Ocelot and verify it compiles without any error.

Change-Id: Ideea34defdb6f4da63374ae09e2088c3de745657
Signed-off-by: Sowmya Aralguppe <sowmya.aralguppe@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/88173
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Avi Uday <aviuday@google.com>
2025-07-08 16:15:48 +00:00
..
acpi drivers/crb/tpm: Add new method to retrieve base address 2025-07-02 16:15:09 +00:00
arch arch/x86/postcar_loader: Add comment line for reloc_params assignment 2025-07-07 14:30:58 +00:00
commonlib commonlib: Add pvmfw related timestamps 2025-07-08 09:22:21 +00:00
console
cpu cpu/intel/haswell: Export PCODE mailbox functions 2025-05-27 15:07:25 +00:00
device device/device_util.c: Complete function documentation 2025-06-15 12:55:59 +00:00
drivers soc/intel: Add Arrow Lake-S/HX IDs 2025-07-03 16:57:15 +00:00
ec mb/google/brox: Enable support for Realtek EC 2025-06-20 17:48:07 +00:00
include soc/intel/pantherlake: Add new MCH ID for Wildcat Lake 2025-07-04 13:17:15 +00:00
lib {lib, drivers/intel}: Add splash screen footer 2025-06-23 02:04:26 +00:00
mainboard mb/google/ocelot/var/ocelot: Add FW_CONFIG for Audio 2025-07-08 16:15:48 +00:00
northbridge Haswell NRI: Implement COMP offset optimisation 2025-07-04 13:17:47 +00:00
sbom sbom: Fix build with merged bootblock and romstage 2025-07-07 14:29:29 +00:00
security security/vboot: Back up CMOS data later boot phase 2025-06-05 13:36:19 +00:00
soc soc/mediatek/mt8189: Increase SPI NOR clock rate from 26MHz to 52MHz 2025-07-08 09:42:51 +00:00
southbridge
superio src/superio/nuvoton: Add HWM initialization code 2025-06-11 13:31:25 +00:00
vendorcode vc/intel/fsp2_0/twinlake: Update FSP headers 2025-07-04 13:17:59 +00:00
Kconfig security/vboot: Back up CMOS data later boot phase 2025-06-05 13:36:19 +00:00