coreboot/src
Hung-Te Lin 8e3bb34d4a tegra124: Never touch MEM(MC)/EMC clocks in ramstage.
The clocks for MEM(MC)/EMC should be either initialized by BootROM, or in the
step of SDRAM initialization. Changing their states in ramstage may cause
unexpected results (note MC even always ignores RESET states).

To make it clear, we should remove MEM/EMC from the clock initialization list.

BUG=none
TEST=emerge-nyan chromeos-coreboot-nyan # boots successfully.

Change-Id: Icff9f78810ed5bd693b48d7b6d436ce2db919a5e
Reviewed-on: https://chromium-review.googlesource.com/183623
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Commit-Queue: Hung-Te Lin <hungte@chromium.org>
Tested-by: Hung-Te Lin <hungte@chromium.org>
2014-01-24 19:38:30 +00:00
..
arch arm: Thumb ALL the things! 2014-01-14 03:29:48 +00:00
console ARM: Generalize armv7 as arm. 2013-10-02 09:18:44 +00:00
cpu cpu/intel: allow non-packaged scoped turbo setting 2014-01-15 04:52:13 +00:00
device pnp: Allow setting of misc register 0xf4 in device tree 2013-12-20 00:37:38 +00:00
drivers Haswell/falco/peppy/slippy: continue to clean up FUI. 2013-12-19 01:17:37 +00:00
ec chromeec: add function to reboot on unexpected image 2014-01-10 00:11:54 +00:00
include baytrail: snapshot power state in romstage 2014-01-09 20:15:55 +00:00
lib baytrail: snapshot power state in romstage 2014-01-09 20:15:55 +00:00
mainboard tegra124: Never touch MEM(MC)/EMC clocks in ramstage. 2014-01-24 19:38:30 +00:00
northbridge peppy and falco: set panel power timings in northbridge, using devicetree, not mainboards 2013-12-23 08:55:32 +00:00
soc tegra124: Add EMC registers definition. 2014-01-24 19:38:26 +00:00
southbridge libpayload: find source of input characters 2014-01-19 04:15:03 +00:00
superio pnp: Allow setting of misc register 0xf4 in device tree 2013-12-20 00:37:38 +00:00
vendorcode VBOOT: Set virtual recovery switch based on EC Software Sync 2014-01-23 19:32:35 +00:00
Kconfig armv8: add support for armv8 cpu 2014-01-07 02:48:47 +00:00