coreboot/src
Aaron Durbin 8d5795fbff tegra132: split memory range querying to above/below 4GiB
The address map code was originally assuming all carveouts would
be packed together in the upper end of the physical memory
address space. However, the trust zone carveout is always in the
32-bit address space. Therefore, one needs to query memory ranges
by above and below 4GiB with the assumption of carveouts being
packed at the top of *each* resulting range.

BUG=chrome-os-partner:30572
BRANCH=None
TEST=Built and ran through coreboot on rush.

Change-Id: Iab134a049f3726f1ec41fc6626b1a6683d9f5362
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/208101
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Commit-Queue: Furquan Shaikh <furquan@chromium.org>
2014-07-16 19:21:47 +00:00
..
arch arm64: provide early SoC initialization 2014-07-15 21:20:58 +00:00
console
cpu
device
drivers
ec
include
lib
mainboard samus: Delay bringing SSD out of reset 2014-07-16 07:12:13 +00:00
northbridge
soc tegra132: split memory range querying to above/below 4GiB 2014-07-16 19:21:47 +00:00
southbridge
superio
vendorcode
Kconfig