Duncan Laurie 8b2ce5c584 samus: Update SPD ... - geometry was incorrect for 8GB modules, should be x32, so refactor the rest of the geometry to match - some of the timing values were off, calcualte new values from the datasheet BUG=chrome-os-partner:28234 BRANCH=None TEST=build and boot on samus Change-Id: I645f354ef21c5032ab73c66e1ad843136ec93eff Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/210660 Reviewed-by: Aaron Durbin <adurbin@chromium.org>		2014-07-31 22:45:36 +00:00
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arch	arm64: Seed the stack at stage_entry	2014-07-31 06:39:40 +00:00
console	vboot2: implement select_firmware for pre-romstage verification	2014-06-30 18:45:09 +00:00
cpu	haswell: Update microcode revision	2014-07-29 04:37:18 +00:00
device	i2c: Add software_i2c driver for I2C debugging and emulation	2014-05-19 20:34:31 +00:00
drivers	vboot2: read secdata and nvdata	2014-07-23 02:29:18 +00:00
ec	vboot2: read dev and recovery switch	2014-07-02 00:45:22 +00:00
include	Publish the board ID value in coreboot table, when configured	2014-07-30 23:41:05 +00:00
lib	Include board ID calculations only when necessary	2014-07-30 23:41:10 +00:00
mainboard	samus: Update SPD	2014-07-31 22:45:36 +00:00
northbridge	coreboot: Rename coreboot_ram stage to ramstage	2014-05-07 23:30:23 +00:00
soc	broadwell: Add config option to disable DSP power gating in D3	2014-07-31 22:45:32 +00:00
southbridge	coreboot: Rename coreboot_ram stage to ramstage	2014-05-07 23:30:23 +00:00
superio	pnp: Allow setting of misc register 0xf4 in device tree	2013-12-20 00:37:38 +00:00
vendorcode	vboot: Update VBOOT_CFLAGS to include rmodules ccopts	2014-07-30 03:09:55 +00:00
Kconfig	Enable publishing of board ID where supported	2014-07-30 23:41:23 +00:00