Chen-Tsung Hsieh aa77ddb44a soc/mediatek/common: Combine dsi_cmdq_size register writes ... Combine the size calculation and the CMDQ_SIZE_SEL bit setting into a single write32 call for dsi->dsi_cmdq_size to optimize register access. BUG=b:474187570 TEST=util/abuild/abuild -x -t GOOGLE_SKYWALKER -a --clean BRANCH=skywalker Change-Id: Idd08c8fab4120878c53fb94bf0e3cddb9a7eb513 Signed-off-by: Chen-Tsung Hsieh <chentsung@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/90874 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@mailbox.org> Reviewed-by: Yu-Ping Wu <yupingso@google.com>		2026-01-25 19:06:22 +00:00
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common	soc/mediatek/common: Combine dsi_cmdq_size register writes	2026-01-25 19:06:22 +00:00
mt8173	soc/mediatek: Pass dsi_regs/mipi_tx_regs to DSI API	2025-12-12 02:19:09 +00:00
mt8183	soc/mediatek: Move dsi_regs/mipi_tx_regs definitions to soc/dsi_reg.h	2025-12-12 02:18:24 +00:00
mt8186	soc/mediatek: Drop mtk_ddp_soc_mode_set()	2025-12-23 04:38:47 +00:00
mt8188	soc/mediatek: Drop mtk_ddp_soc_mode_set()	2025-12-23 04:38:47 +00:00
mt8189	soc/mediatek: Correct BIAS_ON value to get bias ready	2025-12-26 05:46:02 +00:00
mt8192	soc/mediatek: Move dsi_regs/mipi_tx_regs definitions to soc/dsi_reg.h	2025-12-12 02:18:24 +00:00
mt8195	soc/mediatek: Drop mtk_ddp_soc_mode_set()	2025-12-23 04:38:47 +00:00
mt8196	soc/mediatek/mt8196: Remove unused MTE_TAG_ADDR macro	2026-01-22 16:24:48 +00:00