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soc/mediatek/common: Combine dsi_cmdq_size register writes

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Combine the size calculation and the CMDQ_SIZE_SEL bit setting into a
single write32 call for dsi->dsi_cmdq_size to optimize register access.

BUG=b:474187570
TEST=util/abuild/abuild -x -t GOOGLE_SKYWALKER -a --clean
BRANCH=skywalker

Change-Id: Idd08c8fab4120878c53fb94bf0e3cddb9a7eb513
Signed-off-by: Chen-Tsung Hsieh <chentsung@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/90874
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
This commit is contained in:
Chen-Tsung Hsieh 2026-01-23 08:42:23 +00:00 • committed by Matt DeVillier
commit aa77ddb44a
1 changed files with 1 additions and 2 deletions
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3
src/soc/mediatek/common/dsi_common.c
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@ -421,8 +421,7 @@ static enum cb_err mtk_dsi_cmdq(enum mipi_dsi_transaction type, const u8 *data,
}
buffer_to_fifo32_prefix(tx_buf, prefix, prefsz, prefsz + len, &dsi->dsi_cmdq[0],
4, 4);
write32(&dsi->dsi_cmdq_size, DIV_ROUND_UP(prefsz + len, 4));
setbits32(&dsi->dsi_cmdq_size, CMDQ_SIZE_SEL);
write32(&dsi->dsi_cmdq_size, DIV_ROUND_UP(prefsz + len, 4) | CMDQ_SIZE_SEL);
}
mtk_dsi_enable_and_start(is_dsi_dual_channel);