Shawn Nematbakhsh 20c925d8a8 rambi: Move KBD_IRQ pin for Rambi 2.0 board ... KBD_IRQ# is moved to GPIO SC101, with SC50 going back to its original SERIRQ function. Note that this change breaks Rambi 1.5 keyboard functionality. BUG=chrome-os-partner:24424 TEST=Manual on Rambi 2.0. Verify KB functions in OS with SC50 / SERIRQ KB interrupt toggling removed from EC code. BRANCH=Rambi, Glimmer, Clapper Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Change-Id: I3fa40441741ea9d52a6e2ff15925570510b5b82b Reviewed-on: https://chromium-review.googlesource.com/181757 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org>		2014-01-08 02:24:55 +00:00
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arch	Add initial aarch64 support	2013-12-19 02:33:34 +00:00
console	ARM: Generalize armv7 as arm.	2013-10-02 09:18:44 +00:00
cpu	armv8: add support for armv8 cpu	2014-01-07 02:48:47 +00:00
device	pnp: Allow setting of misc register 0xf4 in device tree	2013-12-20 00:37:38 +00:00
drivers	Haswell/falco/peppy/slippy: continue to clean up FUI.	2013-12-19 01:17:37 +00:00
ec	chrome ec: Update header and add functions to support DPTF	2014-01-07 02:48:36 +00:00
include	pnp: Allow setting of misc register 0xf4 in device tree	2013-12-20 00:37:38 +00:00
lib	implement a simple payload chooser for coreboot.	2013-12-23 07:57:10 +00:00
mainboard	rambi: Move KBD_IRQ pin for Rambi 2.0 board	2014-01-08 02:24:55 +00:00
northbridge	peppy and falco: set panel power timings in northbridge, using devicetree, not mainboards	2013-12-23 08:55:32 +00:00
soc	tegra124: norrin: display code clean up	2014-01-07 21:42:50 +00:00
southbridge	lynxpoint: Don't enable SMI handling of TCO	2013-12-18 21:25:27 +00:00
superio	pnp: Allow setting of misc register 0xf4 in device tree	2013-12-20 00:37:38 +00:00
vendorcode	chromeos: add VBOOT_REFCODE_INDEX option	2013-12-17 21:27:07 +00:00
Kconfig	armv8: add support for armv8 cpu	2014-01-07 02:48:47 +00:00