Commit graph

16,019 commits

Author SHA1 Message Date
Vincent Palatin
6889c4c8da UPSTREAM: google/eve: Update MCU GPIOs configuration
Keep the BOOT0 pin triggering the MCU bootloader as an input,
so the Servo debug board doesn't have to fight with the PCH to program
it, the net already has an external pull-down to ensure that the MCU is
in normal mode at boot.

By default, do not drive the FP sensor reset from the PCH, the MCU is
now managing the reset line (but the PCH still has a connection on the
current boards).

BRANCH=none
BUG=b:36025702
TEST=manual testing, program the MCU through a Servo v2 board, and use
the FP sensor through the MCU and verify it is not stuck under reset.

Change-Id: I9bb2dfe49e0396a406fb807438ae7a8f125bb7a1
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 08824ec8d4
Original-Change-Id: I19113b5d78013d0ab6ec5a72c6f71dd4c67a88e8
Original-Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
Original-Reviewed-on: https://review.coreboot.org/18830
Original-Tested-by: build bot (Jenkins)
Original-Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Original-Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-on: https://chromium-review.googlesource.com/455850
2017-03-16 11:25:38 -07:00
Duncan Laurie
59baa79280 UPSTREAM: google/eve: Apply default AC/DC loadline settings
Set the AC and DC loadline values based on the KBL-Y 2+2 defaults
that are applied by FSP.  These will be tuned later and are exposed
as defaults so the engineers know what to start with.

BUG=b:36228330
BRANCH=none
TEST=Build and boot on Eve and check debug FSP output to ensure that
it is applying the provided loadline values

Change-Id: I2a78f75dea7f4fce2fb8d9c4adf0090782c0171f
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 57e9e3be5f
Original-Change-Id: Ieae4f2b201d8210e75bdb9438070a3a2e1fda6b7
Original-Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Original-Reviewed-on: https://review.coreboot.org/18820
Original-Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Original-Reviewed-by: Furquan Shaikh <furquan@google.com>
Original-Tested-by: build bot (Jenkins)
Reviewed-on: https://chromium-review.googlesource.com/455849
2017-03-16 11:25:38 -07:00
Duncan Laurie
f5df7344df UPSTREAM: intel/skylake: Support for setting AC/DC loadline
Add options to set the AC and DC loadline values for each supported
VR type so these can be tuned on a per-board basis in devicetree.cb.

BUG=b:36228330
BRANCH=none
TEST=Build and boot on Eve and check debug FSP output to ensure that
it is applying the provided loadline values

Change-Id: I0c34f14c4354e567dd750873ac1c50e6ecfc5fe9
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 86db469871
Original-Change-Id: I2a5533d2c9fd86351c86584e3738e80ac4c1f915
Original-Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Original-Reviewed-on: https://review.coreboot.org/18819
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Original-Tested-by: build bot (Jenkins)
Reviewed-on: https://chromium-review.googlesource.com/455848
2017-03-16 11:25:37 -07:00
Duncan Laurie
8684b5aa5d UPSTREAM: intel/skylake: Fix bug in VR configuration with FSP 2.0
With the move to FSP 2.0 the number of VR types supported was
reduced to 4, and the VR_RING type is no longer present.

This means all existing boards using FSP 2.0 are incorrectly
passing VR configuration into FSP as the values corresponding to
"GT Sliced" and "GT Unsliced" have changed.

Fix this by updating the skylake SOC VR handling to account for
changes in the FSP configuration and no longer provide VR_RING
type when using FSP 2.0.

BUG=b:36228330
BRANCH=none
TEST=manual: build and boot on Eve

Change-Id: I7282b870cc4e6a6192f95239b8e5abc0cd63e7af
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 4fa8a6f4fe
Original-Change-Id: I59eea9fba006a4c235d7b42d07fdc6e4f44f7351
Original-Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Original-Reviewed-on: https://review.coreboot.org/18818
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Original-Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Original-Reviewed-by: Furquan Shaikh <furquan@google.com>
Original-Tested-by: build bot (Jenkins)
Reviewed-on: https://chromium-review.googlesource.com/455847
2017-03-16 11:25:37 -07:00
Duncan Laurie
3bca0d761e UPSTREAM: google/eve: Use rt5514 instead of 4ch DMIC
On this platform the DMICs are connected to the rt5514 DSP instead
of directly connected to the SOC.  Use the new rt5514 NHLT blob
instead of the 4ch DMIC blob and add the required I2C and SPI
entries in devicetree so this can get probed properly.

BUG=b:35585307
BRANCH=none
TEST=build and boot on Eve P1 and check for rt5514 driver enumerated
by the kernel

Change-Id: I0ad047f30298f17df807715ac97d8311c0a74985
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 2661a9f517
Original-Change-Id: I0f2cb532771ee1857df7f33c52a96acf96dc1f54
Original-Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Original-Reviewed-on: https://review.coreboot.org/18817
Original-Tested-by: build bot (Jenkins)
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Original-Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Original-Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://chromium-review.googlesource.com/455846
2017-03-16 11:25:36 -07:00
Duncan Laurie
65fb2036db UPSTREAM: intel/skylake: nhlt: Add support for rt5514 NHLT blob
Add support for describing the NHLT blob for the rt5514 DSP.
Currently this only supports 4 channel capture.

BUG=b:35585307
BRANCH=none
TEST=build and boot on Eve P1

Change-Id: I428bcfc49875e46de307fb204fe9e5300d3bff5c
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 4a75a66d67
Original-Change-Id: Ib59b56222f9aa65370fdcf9ddf25145c571b1b2e
Original-Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Original-Reviewed-on: https://review.coreboot.org/18816
Original-Tested-by: build bot (Jenkins)
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Original-Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Original-Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://chromium-review.googlesource.com/455845
2017-03-16 11:25:36 -07:00
Duncan Laurie
23328bade9 UPSTREAM: acpi: device: Add macro for active high level triggered IRQ
Add the missing macro for ACPI_IRQ_LEVEL_HIGH so it can get
used by devicetree when necessary.

BUG=b:35585307
BRANCH=none
TEST=Add rt5514 SPI device with active high level IRQ on Eve board
and check that it is enumerated in the kernel

Change-Id: If1600c8d14e3a920e9f4eb1ec1e3dd62a75349c0
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 7273e18399
Original-Change-Id: I25c7b035a198efb218f0f6b4ba3f4a1bf532bcea
Original-Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Original-Reviewed-on: https://review.coreboot.org/18815
Original-Tested-by: build bot (Jenkins)
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Original-Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Original-Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://chromium-review.googlesource.com/455844
2017-03-16 11:25:35 -07:00
Kyösti Mälkki
c19aeabec8 UPSTREAM: AGESA f14: Fix infinite loop
Fix regression after commit:
  22f32c7 cpu/amd/agesa: Unify init files

BUG=none
BRANCH=none
TEST=none

Change-Id: I7eb5184f30d03e8cc1be0f0e030b5c810cac18d6
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 7f3741840c
Original-Change-Id: I36fb7369084c68577df69abc251c84dad64f7015
Original-Signed-off-by: Kysti Mlkki <kyosti.malkki@gmail.com>
Original-Reviewed-on: https://review.coreboot.org/18822
Original-Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
Original-Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Original-Reviewed-by: Nico Huber <nico.h@gmx.de>
Original-Tested-by: build bot (Jenkins)
Reviewed-on: https://chromium-review.googlesource.com/455843
2017-03-16 11:25:35 -07:00
Mario Scheithauer
d6e446de08 UPSTREAM: siemens/mc_apl1: Clean up the code
This patch make some general adaptations in relation to commit 6a489237
(mainboard/intel/leafhill: Clean up).

- add necessary defaults to Kconfig
- remove irrelevant entries from FMD file
- include romstage file for better understanding

BUG=none
BRANCH=none
TEST=none

Change-Id: I83bed6c31afb22f045f674fd8d523039bcddc9f5
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 0853055ef7
Original-Change-Id: I190d648a7ffeca11acc6560db85ff03c78e85b21
Original-Signed-off-by: Mario Scheithauer <mario.scheithauer@siemens.com>
Original-Reviewed-on: https://review.coreboot.org/18808
Original-Tested-by: build bot (Jenkins)
Original-Reviewed-by: Andrey Petrov <andrey.petrov@intel.com>
Original-Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
Original-Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-on: https://chromium-review.googlesource.com/455842
2017-03-16 11:25:35 -07:00
Lee Leahy
b8ceff13c2 UPSTREAM: soc/intel/quark: Read the rmu.bin file from read-only region
Always read the rmu.bin file from the read-only section of the SPI
flash.  Without this change vboot attempts to read this file from the
A or B section of the flash.

TEST=Build and run on Galileo Gen2

Change-Id: I236241e92774d323475f2baf4f6d527142f9ae67
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 70bb05715a
Original-Change-Id: Ied8eaa2cd37645bf401aa957936943946bfd6182
Original-Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Original-Reviewed-on: https://review.coreboot.org/18803
Original-Tested-by: build bot (Jenkins)
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/455831
2017-03-16 11:25:34 -07:00
Lee Leahy
d94f61610b UPSTREAM: src/lib: Clean up general issues found by checkpatch.pl
Fix the following errors and warnings detected by checkpatch.pl:

ERROR: Bad function definition - void init_timer() should probably be void init_timer(void)
ERROR: Prefixing 0x with decimal output is defective
WARNING: Comparisons should place the constant on the right side of the test
WARNING: char * array declaration might be better as static const

TEST=Build and run on Galileo Gen2

Change-Id: Iec5a6af53d53d9d96c60c3fc7b70d4e20bcef1fc
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 36984d85e7
Original-Change-Id: I9f618eea95e1f92fa34f4f89da27c0b16ae7f4ee
Original-Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com>
Original-Reviewed-on: https://review.coreboot.org/18763
Original-Tested-by: build bot (Jenkins)
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/455830
2017-03-16 11:25:34 -07:00
Lee Leahy
68e7a32ca4 UPSTREAM: src/lib: Move assignment out of if condition
Fix the following error detected by checkpatch:

ERROR: do not use assignment in if condition

TEST=Build and run on Galileo Gen2

Change-Id: I8ab29cc0451e98c34eff060eb325dbb351fd50af
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 491c5b60d0
Original-Change-Id: I5a08d1647db66bd5d480f81e90d473999c222acf
Original-Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com>
Original-Reviewed-on: https://review.coreboot.org/18761
Original-Tested-by: build bot (Jenkins)
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/455829
2017-03-16 11:25:33 -07:00
Lee Leahy
98a991f241 UPSTREAM: soc/intel/common: Wrap lines at 80 columns
Fix the following error detected by checkpatch.pl:

ERROR: code indent should use tabs where possible

TEST=Build and run on Galileo Gen2

Change-Id: If82533a86037d743c997cd6a042b4eca9bcbe856
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 006d73d2e2
Original-Change-Id: Ief4b96073b3df30e45bf5d802ca3b190e7f431a7
Original-Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com>
Original-Reviewed-on: https://review.coreboot.org/18753
Original-Tested-by: build bot (Jenkins)
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/455828
2017-03-16 11:25:33 -07:00
Andrey Petrov
60dd4c9e6e UPSTREAM: soc/intel/apollolake: Cache FPF status value in flash
Since asking CSE to read FPF status turned out to be slow in some
cases, cache and save returned value on first boot only. Value is
read from flash on consequent boots.

BUG=b:35586975
BRANCH=reef
TEST=boot twice, make sure cached FPF status is loaded from
flash the second time.

Change-Id: Ida11aa2c7dc47dc791162af12bbe1a7e59de1ff1
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: c5f3685f44
Original-Change-Id: I6e56a35407c9097616ccb05a557fded7b639c88a
Original-Signed-off-by: Andrey Petrov <andrey.petrov@intel.com>
Original-Reviewed-on: https://review.coreboot.org/18774
Original-Tested-by: build bot (Jenkins)
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/455827
2017-03-16 11:25:32 -07:00
Andrey Petrov
5ef8f7c4ce UPSTREAM: mainboard/google/reef: Add FPF_STATUS FMAP region
Add FPF_STATUS region under MISC_RW. The purpose of the region is to
store FPF status.

BUG=none
BRANCH=none
TEST=none

Change-Id: If06c124f5ce9bff0d843abc21c20c21c1a21ab61
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 2e726f605d
Original-Change-Id: I2997b3d39a94bf444df51068f254edcf49c47afd
Original-Signed-off-by: Andrey Petrov <andrey.petrov@intel.com>
Original-Reviewed-on: https://review.coreboot.org/18773
Original-Reviewed-by: Lijian Zhao <lijian.zhao@intel.com>
Original-Tested-by: build bot (Jenkins)
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/455826
2017-03-16 11:25:32 -07:00
Lee Leahy
9f9f9e3f22 UPSTREAM: soc/intel/quark: Pass S3 wake status to fsp_silicon_init
Fix build error with FSP 1.1.  Pass the S3 wake status to
fsp_silicon_init.

TEST=Build and run on Galileo Gen2

Change-Id: Icd837562ee4ace32219296013f0fd818ba74ab07
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 1e24bf3f71
Original-Change-Id: I78150f737321db5b1b4d63b411fa6432ac30d080
Original-Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Original-Reviewed-on: https://review.coreboot.org/18805
Original-Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Original-Tested-by: Martin Roth <martinroth@google.com>
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/455824
2017-03-16 11:25:31 -07:00
Lee Leahy
3670883d4b UPSTREAM: soc/intel/quark: Add ESRAM display to FSP 1.1
Add ESRAM display to FSP 1.1

TEST=Build and run on Galileo Gen2

Change-Id: I945b0dbcb4c493863a196b5449494a4ceb38698d
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 66b0d55d32
Original-Change-Id: Ia47b0bdba65606a7f0695332d298fc1e910b0e2f
Original-Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Original-Reviewed-on: https://review.coreboot.org/18804
Original-Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Original-Tested-by: build bot (Jenkins)
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/455823
2017-03-16 11:25:31 -07:00
Lee Leahy
9c1b53dca1 UPSTREAM: soc/intel/quark: Return NULL for top_of_memory
Return NULL for top_of_memory when the register has not been set.

TEST=Build and run on Galileo Gen2

Change-Id: I86684044fc282eaa8deda2b5dbd8ab6cae095d72
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 6edb314050
Original-Change-Id: If79cac68c2a64aa9bf3be72d3cfc4c73fceef12b
Original-Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Original-Reviewed-on: https://review.coreboot.org/18802
Original-Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Original-Tested-by: Martin Roth <martinroth@google.com>
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/455822
2017-03-16 11:25:30 -07:00
Lee Leahy
1522f890c6 UPSTREAM: vboot: Allow other platforms to use soft reboot workaround
Add a Kconfig value to enable other platforms to use the soft reboot
workaround.

TEST=Build and run on Galileo Gen2

Change-Id: I6055693c8c02e7448390750a1865f14452aaf553
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 33efd98cfd
Original-Change-Id: I5a7ebd200229654128d367ecb50647ff69bb5258
Original-Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Original-Reviewed-on: https://review.coreboot.org/18798
Original-Tested-by: Martin Roth <martinroth@google.com>
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/455821
2017-03-16 00:11:37 -07:00
Lee Leahy
98ea8588be UPSTREAM: drivers/intel/fsp1_1: Only display MMCONF address if supported
Disable the display of the MMCONF_BASE_ADDRESS if it is not supported.

TEST=Build and run on Galileo Gen2

Change-Id: Ib5096ea1d53d56792b88bfb2d5c5ba0b22e9f89a
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: c253a92299
Original-Change-Id: Ie4f0fbf264662b5bc12ca923f25395e5e91defea
Original-Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Original-Reviewed-on: https://review.coreboot.org/18801
Original-Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Original-Tested-by: Martin Roth <martinroth@google.com>
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/455820
2017-03-16 00:11:37 -07:00
Denis 'GNUtoo' Carikli
8d8b2911c8 UPSTREAM: GDB_WAIT: Clarify Kconfig description
The user has to know in which stage gdb is waiting to be able to
use symbolic debugging.

BUG=none
BRANCH=none
TEST=none

Change-Id: Ib350d5305384b42d09b0660f15c9708537d29590
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 7d234f2e69
Original-Change-Id: Ia992e7a2077b92c45546ae56c5fb648775f8f63b
Original-Signed-off-by: Denis 'GNUtoo' Carikli <GNUtoo@no-log.org>
Original-Reviewed-on: https://review.coreboot.org/12709
Original-Tested-by: build bot (Jenkins)
Original-Reviewed-by: Jonathan Neuschfer <j.neuschaefer@gmx.net>
Original-Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://chromium-review.googlesource.com/455818
2017-03-16 00:11:36 -07:00
Barnali Sarkar
aa45e29f4d UPSTREAM: soc/intel/skylake: Extract DIMM Information from FSP MEM INFO HOB
Extract SMBIOS memory information from FSP SMBIOS_MEM_INFO_HOB
and save it in CBMEM.

BUG=chrome-os-partner:61729
BRANCH=none
TEST=Build and boot KBLRVP to verify the type 17 DIMM info coming in
SMBIOS Table from Kernel command "dmidecode".

Change-Id: I6550af3135c9a5626292b81c6c93856ec7243818
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: b7fa7fbbd7
Original-Change-Id: I593d4ccb0d4866e99913a73c49b2f000b51827d1
Original-Signed-off-by: Barnali Sarkar <barnali.sarkar@intel.com>
Original-Signed-off-by: Rizwan Qureshi <rizwan.qureshi@intel.com>
Original-Reviewed-on: https://review.coreboot.org/18275
Original-Tested-by: build bot (Jenkins)
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Original-Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://chromium-review.googlesource.com/455037
2017-03-14 17:09:57 -07:00
Julius Werner
94e01f5e6d tpm: spi: Fix compile-time bug with pointer arguments
CL:452283 (tpm: spi: cr50: try to wake cr50 if it is asleep) introduced
a compile-time error by passing an argument the wrong way (probably due
to cherry-picking from an older branch and not testing it again). Due to
a misconfiguration this slipped by our continuous integration testing.
Fix it.

Jeffy, please re-test with this patch on ToT when you have time so we
can make sure the code actually works as intended now, too.

BRANCH=None?
BUG=None
TEST=Compiled GRU_HAS_TPM2 board.

Change-Id: I3210cd53014a206f5d36abcfe607a9710a8253fa
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/454921
Reviewed-by: Douglas Anderson <dianders@chromium.org>
2017-03-14 19:52:49 +00:00
Katherine Hsieh
ea76794f82 UPSTREAM: google/sand: Remove support for tablet mode switch
Sand is not convertible and no EC sensor sends event from EC to AP.
That event default is tablet mode, we don't have to enable tablet event.

Modify the ec.h, is based on <baseboard/ec.h>

BUG=b:36108742
BRANCH=reef
TEST=emerge-sand coreboot, boot to OS and touchpad and keyboard can work.

Change-Id: I4226621b999f2d3bf92922e26ff1f40689a3bdb4
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 20e86be181
Original-Change-Id: I6b6b45b5b4daf2c430ed18130f39eab0bd9a9812
Original-Signed-off-by: Katherine Hsieh <Katherine.Hsieh@quantatw.com>
Original-Reviewed-on: https://review.coreboot.org/18737
Original-Tested-by: build bot (Jenkins)
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/454574
2017-03-14 07:25:38 -07:00
Lee Leahy
afe93a61bf UPSTREAM: soc/intel/quark: Add the verstage files
Add the files to support verstage for vboot.

TEST=Build and run on Galileo Gen2

Change-Id: Ic1312c0be3b987e85f07bc5f8fe49705166d7d9e
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: b8f5323107
Original-Change-Id: Icf87075012c08cf581c17d579e0763888c707265
Original-Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Original-Reviewed-on: https://review.coreboot.org/18040
Original-Tested-by: build bot (Jenkins)
Original-Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Original-Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://chromium-review.googlesource.com/454573
2017-03-14 07:25:38 -07:00
Lee Leahy
0923d31a8d UPSTREAM: src/lib: Remove semicolon from end of macro
Fix the following warning detected by checkpatch.pl:

WARNING: macros should not use a trailing semicolon

TEST=Build and run on Galileo Gen2

Change-Id: I8c13e608b0de18a078728256a21515ec8d911ffb
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: f59a75c99d
Original-Change-Id: Ie1d966b0f1f8fff401d6314fd2ef005ab6ac69db
Original-Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com>
Original-Reviewed-on: https://review.coreboot.org/18764
Original-Tested-by: build bot (Jenkins)
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/454572
2017-03-14 07:25:37 -07:00
Lee Leahy
953d331249 UPSTREAM: src/lib: Remove unnecessary code
Fix the following warnings detected by checkpatch.pl:

WARNING: break is not useful after a goto or return
WARNING: Statements terminations use 1 semicolon
WARNING: else is not generally useful after a break or return
WARNING: void function return statements are not generally useful

TEST=Build and run on Galileo Gen2

Change-Id: If08294e1369f06ca18d321d83b2ec4400f9e5891
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 3e1cab447b
Original-Change-Id: I6f095c4e9cb1ee4ff2ebdf095ef612e1a8393231
Original-Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com>
Original-Reviewed-on: https://review.coreboot.org/18762
Original-Tested-by: build bot (Jenkins)
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/454571
2017-03-14 07:25:37 -07:00
Lee Leahy
cb312131d2 UPSTREAM: commonlib: Wrap lines at 80 columns
Fix the following warning detected by checkpatch.pl:

TEST=Build and run on Galileo Gen2

Change-Id: Ib1fb7473010736c96ff3794cdde980d511bf65c7
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 49fd42dc65
Original-Change-Id: I811763c6de57dfdf5456579f63e83dca29d37d61
Original-Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com>
Original-Reviewed-on: https://review.coreboot.org/18751
Original-Tested-by: build bot (Jenkins)
Original-Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://chromium-review.googlesource.com/454570
2017-03-14 07:25:36 -07:00
Lee Leahy
271c1ae721 UPSTREAM: soc/intel/apollolake: Wrap lines at 80 columns
Fix the following warning detected by checkpatch.pl:

WARNING: line over 80 characters

TEST=Build for reef

Change-Id: Ib6f457d2f7bf367ddf538c61f3c2d8efc6cab532
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 07441b5ae6
Original-Change-Id: I4fbe95037ca4b52e64ba37e5c739af4a03f64feb
Original-Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Original-Reviewed-on: https://review.coreboot.org/18728
Original-Tested-by: build bot (Jenkins)
Original-Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://chromium-review.googlesource.com/454569
2017-03-14 07:25:36 -07:00
Lee Leahy
fddc8132f9 UPSTREAM: soc/intel/apollolake: Fix issues detected by checkpatch
Fix the following errors and warnings detected by checkpatch.pl:

ERROR: switch and case should be at the same indent
ERROR: do not use assignment in if condition
WARNING: Statements terminations use 1 semicolon
WARNING: unnecessary whitespace before a quoted newline
WARNING: else is not generally useful after a break or return

TEST=Build for reef

Change-Id: Icd638905143cbe0ea2ae692ac137fae76e9daf06
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: a444753596
Original-Change-Id: I5486936dbf19b066c76179d929660affa1da5f16
Original-Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Original-Reviewed-on: https://review.coreboot.org/18727
Original-Tested-by: build bot (Jenkins)
Original-Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://chromium-review.googlesource.com/454568
2017-03-14 07:25:35 -07:00
Lee Leahy
bec2b61dce UPSTREAM: soc/intel/apollolake: Fix position of storage class
Fix the following error and warning detected by checkpatch.pl:

ERROR: inline keyword should sit between storage class and type
WARNING: storage class should be at the beginning of the declaration

TEST=Build for reef

Change-Id: Ie77611f00d3eda395c8f3f3a1ce8e130949bfd9e
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 2d154e8213
Original-Change-Id: I2ed418cc3b4a989eb1101013944169429bf147c2
Original-Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Original-Reviewed-on: https://review.coreboot.org/18726
Original-Tested-by: build bot (Jenkins)
Original-Reviewed-by: Philippe Mathieu-Daud <philippe.mathieu.daude@gmail.com>
Original-Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://chromium-review.googlesource.com/454567
2017-03-14 07:25:35 -07:00
Lee Leahy
1862ffb841 UPSTREAM: soc/intel/apollolake: Fix parenthesis issues
Fix the following errors and warning detected by checkpatch.pl:

ERROR: space required before the open parenthesis '('
ERROR: space prohibited before that close parenthesis ')'
ERROR: return is not a function, parentheses are not required
WARNING: space prohibited between function name and open parenthesis '('

TEST=Build for reef

Change-Id: Ia137d5c6bb4416931dfe87fce69137de5888996f
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: d8fb362ea0
Original-Change-Id: I31f854adf3269ba6f77c4044fb3748bb1957841c
Original-Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Original-Reviewed-on: https://review.coreboot.org/18725
Original-Tested-by: build bot (Jenkins)
Original-Reviewed-by: Philippe Mathieu-Daud <philippe.mathieu.daude@gmail.com>
Original-Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://chromium-review.googlesource.com/454566
2017-03-14 07:25:35 -07:00
Lee Leahy
c17aff8741 UPSTREAM: soc/intel/apollolake: Fix unsigned warnings
Fix the following warning detected by checkpatch.pl:

WARNING: Prefer 'unsigned int' to bare use of 'unsigned'

TEST=Build for reef

Change-Id: I61a84be89ab8a95e1cf6bc27054e9c50b44613a9
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 0096d07274
Original-Change-Id: Ifc45ce90d466d087cd20af72ddfc8486d2f1492c
Original-Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Original-Reviewed-on: https://review.coreboot.org/18724
Original-Reviewed-by: Philippe Mathieu-Daud <philippe.mathieu.daude@gmail.com>
Original-Tested-by: build bot (Jenkins)
Original-Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://chromium-review.googlesource.com/454565
2017-03-14 07:25:34 -07:00
Lee Leahy
d793bc28d8 UPSTREAM: soc/intel/apollolake: Remove unnecessary braces
Fix the following warnings detected by checkpatch.pl:

WARNING: braces {} are not necessary for any arm of this statement
WARNING: braces {} are not necessary for single statement blocks

TEST=Build for reef

Change-Id: If5e634a92e3f2f1a2a9a609898eedf95de6f878b
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 4430f9f75d
Original-Change-Id: Ifab09c023faa7da215945f1aedd391f4b2a1a04c
Original-Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Original-Reviewed-on: https://review.coreboot.org/18723
Original-Tested-by: build bot (Jenkins)
Original-Reviewed-by: Philippe Mathieu-Daud <philippe.mathieu.daude@gmail.com>
Original-Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://chromium-review.googlesource.com/454564
2017-03-14 07:25:34 -07:00
Lee Leahy
18a3cd1a51 UPSTREAM: soc/intel/apollolake: Indent code using tabs
Fix the following error and warnings detected by checkpatch.pl:

ERROR: code indent should use tabs where possible
WARNING: please, no spaces at the start of a line
WARNING: please, no space before tabs

TEST=Build for reef

Change-Id: Ie2f65ba5f25f405ba238223035147f7a427e70a8
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 1d20fe77cb
Original-Change-Id: Id7a758463b95274c5e8bbdd67da0955f1ae78aac
Original-Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Original-Reviewed-on: https://review.coreboot.org/18721
Original-Reviewed-by: Philippe Mathieu-Daud <philippe.mathieu.daude@gmail.com>
Original-Tested-by: build bot (Jenkins)
Original-Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://chromium-review.googlesource.com/454563
2017-03-14 07:25:33 -07:00
Lee Leahy
3f36a279ac UPSTREAM: soc/intel/apollolake: Fix spacing around operators and commas
Fix the following errors detected by checkpatch.pl:

ERROR: spaces required around that '==' (ctx:VxO)
ERROR: space required before that '-' (ctx:OxV)
ERROR: spaces required around that '=' (ctx:VxW)
ERROR: spaces required around that '=' (ctx:WxV)
ERROR: spaces required around that '=' (ctx:VxV)
ERROR: need consistent spacing around '+' (ctx:VxW)
ERROR: space prohibited before that '++' (ctx:WxB)
ERROR: space prohibited before that ',' (ctx:WxW)
ERROR: space required after that ',' (ctx:VxV)

TEST=Build for reef

Change-Id: I9dd232ad0df0ed6d344e2e8109fdbaa9b835f487
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 320b7ca44b
Original-Change-Id: I37265a69fcb14fbf7c182ef29d823f70a5748ad8
Original-Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Original-Reviewed-on: https://review.coreboot.org/18720
Original-Tested-by: build bot (Jenkins)
Original-Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://chromium-review.googlesource.com/454562
2017-03-14 07:25:33 -07:00
Lee Leahy
5ef77f460e UPSTREAM: soc/intel/apollolake: Fix space between type, * and variable name
Fix the following errors detected by checkpatch.pl:

ERROR: "foo * bar" should be "foo *bar"
ERROR: "(foo*)" should be "(foo *)"

TEST=Build for reef

Change-Id: I7fa59c65c0b536f9ee4a9f6371b253dc771bbce1
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 68571c144e
Original-Change-Id: I4a762d8fa762057a06e601dfed10538adc5d8bc8
Original-Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Original-Reviewed-on: https://review.coreboot.org/18719
Original-Reviewed-by: Philippe Mathieu-Daud <philippe.mathieu.daude@gmail.com>
Original-Tested-by: build bot (Jenkins)
Original-Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://chromium-review.googlesource.com/454561
2017-03-14 07:25:32 -07:00
Lee Leahy
8c246bd611 UPSTREAM: soc/intel/apollolake: Move brace to beginning of line
Fix the following error detected by checkpatch.pl:

ERROR: open brace '{' following function declarations go on the next line

TEST=Build for reef

Change-Id: I15fbc181c58350a6a426d225e6057e9638e52602
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: bab8be229a
Original-Change-Id: Icb92dc49c6e7b8dfea60bc0395f3db7316c4e34c
Original-Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Original-Reviewed-on: https://review.coreboot.org/18722
Original-Tested-by: build bot (Jenkins)
Original-Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://chromium-review.googlesource.com/454560
2017-03-14 07:25:32 -07:00
Lee Leahy
d354460903 UPSTREAM: src/include: Wrap lines at 80 columns
Fix the following warning detected by checkpatch.pl:

WARNING: line over 80 characters

Changed a few comments to reduce line length.  File
src/include/cpu/amd/vr.h was skipped.

TEST=Build and run on Galileo Gen2

Change-Id: I868d34132ba40c314d76c5315f620d8a44d48983
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 6a566d7fbe
Original-Change-Id: Ie3c07111acc1f89923fb31135684a6d28a505b61
Original-Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com>
Original-Reviewed-on: https://review.coreboot.org/18687
Original-Tested-by: build bot (Jenkins)
Original-Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://chromium-review.googlesource.com/454559
2017-03-14 07:25:31 -07:00
Lee Leahy
e4fbfd4ec3 UPSTREAM: src/include: Add space after minus sign
Fix the following error detected by checkpatch.pl:

ERROR: need consistent spacing around '-' (ctx:WxV)

TEST=Build and run on Galileo Gen2

Change-Id: I157d2d382c2dde9bad1dd0a0d7ae50dc2d13ab49
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: d0f26fcea2
Original-Change-Id: Ib4c2c0c19dee842b7cd4da11a47215dc2f124374
Original-Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com>
Original-Reviewed-on: https://review.coreboot.org/18686
Original-Tested-by: build bot (Jenkins)
Original-Reviewed-by: Philippe Mathieu-Daud <philippe.mathieu.daude@gmail.com>
Original-Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://chromium-review.googlesource.com/454558
2017-03-14 07:25:31 -07:00
Lee Leahy
7174c14f64 UPSTREAM: src/include: Remove use of binary constants
Fix the following warning detected by checkpatch.pl:

WARNING: Avoid gcc v4.3+ binary constant extension: <...>

TEST=Build and run on Galileo Gen2

Change-Id: I5e9818d90b3f03ebd93615d76947b7f1ff486d36
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: f0c8a8eb55
Original-Change-Id: Iab29c494060df3f60eff5317259e0fdbfea06f27
Original-Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com>
Original-Reviewed-on: https://review.coreboot.org/18685
Original-Tested-by: build bot (Jenkins)
Original-Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://chromium-review.googlesource.com/454557
2017-03-14 07:25:30 -07:00
Lee Leahy
156d2d82e1 UPSTREAM: src/include: Add spaces around :
Fix the following error detected by checkpatch.pl:

ERROR: spaces required around that ':' (ctx:ExV)

TEST=Build and run on Galileo Gen2

Change-Id: Ic09bea8a28862c5f1837be790cddcdaa3734cc80
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 74f1dc0d38
Original-Change-Id: Idb2ea29a6c7277b319e6600e8a9d7cb8285ae5df
Original-Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com>
Original-Reviewed-on: https://review.coreboot.org/18684
Original-Tested-by: build bot (Jenkins)
Original-Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://chromium-review.googlesource.com/454556
2017-03-14 07:25:30 -07:00
Lee Leahy
2c2c576859 UPSTREAM: src/include: Fix indent for case labels
Fix the following error detected by checkpatch.pl:

ERROR: switch and case should be at the same indent

TEST=Build and run on Galileo Gen2

Change-Id: I28ff7be3bcc7bee821ccd24721bd7f148a9b6bb2
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: db469a689b
Original-Change-Id: I92f00254c7fcb79a5ecd4ba5e19a757cfe5c11fa
Original-Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com>
Original-Reviewed-on: https://review.coreboot.org/18683
Original-Tested-by: build bot (Jenkins)
Original-Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://chromium-review.googlesource.com/454555
2017-03-14 07:25:29 -07:00
Lee Leahy
a642cde9d1 UPSTREAM: src/include: Move constants to the right hand side
Fix the following warning detected by checkpatch.pl:

WARNING: Comparisons should place the constant on the right side of the test

TEST=Build and run on Galileo Gen2

Change-Id: I1b8ba8779e6c03f6d6fa8dcfb93c977e848b36c3
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 6083c7ebc7
Original-Change-Id: Id790e0034ea5c926fcaef95486319d6c0c936f28
Original-Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com>
Original-Reviewed-on: https://review.coreboot.org/18682
Original-Tested-by: build bot (Jenkins)
Original-Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://chromium-review.googlesource.com/454554
2017-03-14 07:25:29 -07:00
Lee Leahy
4d1f363777 UPSTREAM: src/lib: Move asmlinkage before type
Fix the following warning detected by checkpatch.pl:

WARNING: storage class should be at the beginning of the declaration

TEST=Build and run on Galileo Gen2

Change-Id: Ia5276e6664988186fef8ecc32d824380d67909d2
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 696ced6cfb
Original-Change-Id: I7d3135466634a4bb84dcef16dbd68754f8d8d6c2
Original-Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com>
Original-Reviewed-on: https://review.coreboot.org/18760
Original-Tested-by: build bot (Jenkins)
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/454553
2017-03-14 07:25:28 -07:00
Lee Leahy
4dbf24bafc UPSTREAM: src/lib: Fix brace positions
Fix the following errors detected by checkpatch.pl:

ERROR: open brace '{' following function declarations go on the next
line
ERROR: that open brace { should be on the previous line
ERROR: open brace '{' following struct go on the same line
ERROR: else should follow close brace '}'

TEST=Build and run on Galileo Gen2

Change-Id: Iafabd290bcf4223d0bd4bbcd7f179f0053d20214
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 342f8d6e50
Original-Change-Id: I971ada9ba9ba7ce5d8029323710fee1a6166570b
Original-Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com>
Original-Reviewed-on: https://review.coreboot.org/18759
Original-Tested-by: build bot (Jenkins)
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/454552
2017-03-14 07:25:28 -07:00
Lee Leahy
2c20fd8567 UPSTREAM: src/include: Remove space between function name and parameters
Fix the following warning detected by checkpatch.pl:

WARNING: Unnecessary space before function pointer arguments

TEST=Build and run on Galileo Gen2

Change-Id: I20aa4d7fd76c38cfbac38be5114009cf86056ccd
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: bab6bc4d77
Original-Change-Id: I2b56af20d5f74cc2625d3cb357fbb137bd440af0
Original-Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com>
Original-Reviewed-on: https://review.coreboot.org/18660
Original-Tested-by: build bot (Jenkins)
Original-Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://chromium-review.googlesource.com/454551
2017-03-14 07:25:27 -07:00
Lee Leahy
37f46e9b00 UPSTREAM: src/lib: Wrap lines at 80 columns
Fix the following warning detected by checkpatch.pl:

WARNING: line over 80 characters

TEST=Build and run on Galileo Gen2

Change-Id: Ic5caa0914f2ce7b1ff280735bf18b6f82ff39691
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 7340217262
Original-Change-Id: I5fa3f8e950e2f0c60bd0e8f030342dc8c0469299
Original-Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com>
Original-Reviewed-on: https://review.coreboot.org/18758
Original-Tested-by: build bot (Jenkins)
Original-Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://chromium-review.googlesource.com/454550
2017-03-14 07:25:27 -07:00
Lee Leahy
9e38697e8c UPSTREAM: src/include: Move assignment out of if condition
Fix the following error detected by checkpatch.pl:

ERROR: do not use assignment in if condition

TEST=Build and run on Galileo Gen2

Change-Id: I55b19613ce00772a34855590b6736f4281cdf856
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: b1260553be
Original-Change-Id: I911d528bd85afcd9f3837241494f13d1f9f283ab
Original-Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com>
Original-Reviewed-on: https://review.coreboot.org/18659
Original-Tested-by: build bot (Jenkins)
Original-Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://chromium-review.googlesource.com/454549
2017-03-14 07:25:26 -07:00
Lee Leahy
edafcdd6ec UPSTREAM: src/include: Remove unnecessary typecast
Fix the following warning detected by checkpatch.pl:

WARNING: Unnecessary typecast of c90 int constant

TEST=Build and run on Galileo Gen2

Change-Id: I9d48d4e4d6793e834ad69438b2592cbc4168f573
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: b7e692e016
Original-Change-Id: I137efa55e945d1315322df2a38d70716a3807a1e
Original-Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com>
Original-Reviewed-on: https://review.coreboot.org/18658
Original-Tested-by: build bot (Jenkins)
Original-Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://chromium-review.googlesource.com/454548
2017-03-14 07:25:26 -07:00