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UPSTREAM: drivers/intel/fsp1_1: Only display MMCONF address if supported

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Disable the display of the MMCONF_BASE_ADDRESS if it is not supported.

TEST=Build and run on Galileo Gen2

Change-Id: Ib5096ea1d53d56792b88bfb2d5c5ba0b22e9f89a
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: c253a92299
Original-Change-Id: Ie4f0fbf264662b5bc12ca923f25395e5e91defea
Original-Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Original-Reviewed-on: https://review.coreboot.org/18801
Original-Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Original-Tested-by: Martin Roth <martinroth@google.com>
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/455820
This commit is contained in:
Lee Leahy 2017-03-13 17:36:39 -07:00 • committed by chrome-bot
commit 98ea8588be
1 changed files with 3 additions and 2 deletions
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5
src/drivers/intel/fsp1_1/romstage.c
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@ -60,8 +60,9 @@ asmlinkage void *romstage_main(FSP_INFO_HEADER *fih)
memset(&pei_data, 0, sizeof(pei_data));
/* Display parameters */
printk(BIOS_SPEW, "CONFIG_MMCONF_BASE_ADDRESS: 0x%08x\n",
CONFIG_MMCONF_BASE_ADDRESS);
if (!IS_ENABLED(CONFIG_NO_MMCONF_SUPPORT))
printk(BIOS_SPEW, "CONFIG_MMCONF_BASE_ADDRESS: 0x%08x\n",
CONFIG_MMCONF_BASE_ADDRESS);
printk(BIOS_INFO, "Using FSP 1.1\n");
/* Display FSP banner */