erebion/coreboot
1
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity Actions

UPSTREAM: google/eve: Use rt5514 instead of 4ch DMIC

Browse source 
On this platform the DMICs are connected to the rt5514 DSP instead
of directly connected to the SOC.  Use the new rt5514 NHLT blob
instead of the 4ch DMIC blob and add the required I2C and SPI
entries in devicetree so this can get probed properly.

BUG=b:35585307
BRANCH=none
TEST=build and boot on Eve P1 and check for rt5514 driver enumerated
by the kernel

Change-Id: I0ad047f30298f17df807715ac97d8311c0a74985
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 2661a9f517
Original-Change-Id: I0f2cb532771ee1857df7f33c52a96acf96dc1f54
Original-Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Original-Reviewed-on: https://review.coreboot.org/18817
Original-Tested-by: build bot (Jenkins)
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Original-Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Original-Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://chromium-review.googlesource.com/455846
This commit is contained in:
Duncan Laurie 2017-03-02 10:15:23 -08:00 • committed by chrome-bot
commit 3bca0d761e
3 changed files with 18 additions and 5 deletions
Download patch file Download diff file Expand all files Collapse all files

2
src/mainboard/google/eve/Kconfig
View file

@ -66,7 +66,7 @@ config MAX_CPUS
config INCLUDE_NHLT_BLOBS
bool "Include blobs for audio."
select NHLT_DMIC_4CH
select NHLT_RT5514
select NHLT_RT5663
select NHLT_MAX98927

15
src/mainboard/google/eve/devicetree.cb
View file

@ -281,6 +281,12 @@ chip soc/intel/skylake
register "probed" = "1"
device i2c 13 on end
end
chip drivers/i2c/generic
register "hid" = ""10EC5514""
register "name" = ""RT54""
register "desc" = ""Realtek RT5514""
device i2c 57 on end
end
end # I2C #4
device pci 1c.0 on
chip drivers/intel/wifi
@ -301,7 +307,14 @@ chip soc/intel/skylake
device pci 1d.3 off end # PCI Express Port 12
device pci 1e.0 on end # UART #0
device pci 1e.1 off end # UART #1
device pci 1e.2 on end # GSPI #0
device pci 1e.2 on
chip drivers/spi/acpi
register "hid" = "ACPI_DT_NAMESPACE_HID"
register "compat_string" = ""realtek,rt5514""
register "irq" = "ACPI_IRQ_LEVEL_HIGH(GPP_F10_IRQ)"
device spi 0 on end
end
end # GSPI #0
device pci 1e.3 on
chip drivers/spi/acpi
register "hid" = "ACPI_DT_NAMESPACE_HID"

6
src/mainboard/google/eve/mainboard.c
View file

@ -46,9 +46,9 @@ static unsigned long mainboard_write_acpi_tables(
if (!nhlt)
return start_addr;
/* 4 Channel DMIC array. */
if (nhlt_soc_add_dmic_array(nhlt, 4))
printk(BIOS_ERR, "Couldn't add 4CH DMIC arrays.\n");
/* 4 Channel DMIC array */
if (nhlt_soc_add_rt5514(nhlt, AUDIO_LINK_SSP0, 4))
printk(BIOS_ERR, "Couldn't add rt5514.\n");
/* RT5663 Headset codec */
if (nhlt_soc_add_rt5663(nhlt, AUDIO_LINK_SSP1))