coreboot/src
Vadim Bendebury e2aeb2f4e7 storm: initialize dynamic cbmem properly
Dynamic cbmem support has been enabled on storm, but the proper
initialization at romstage is missing.

Proper DRAM base address definition is also necessary so that CBMEM is
placed in the correct address range (presently at the top of DRAM).

BUG=chrome-os-partner:27784

TEST=build boot coreboot on ap148, observe the following in the
     console output:

  Wrote coreboot table at: 5fffd000, 0xe8 bytes, checksum 44a5
  coreboot table: 256 bytes.
  CBMEM ROOT  0. 5ffff000 00001000
  COREBOOT    1. 5fffd000 00002000

Change-Id: I74ccd252ddfdeaa0a5bcc929be72be174f310730
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/199674
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2014-05-14 20:52:37 +00:00
..
arch coreboot: Introduce stage-specific architecture for coreboot 2014-05-09 04:41:47 +00:00
console Add stage information to coreboot banner 2014-05-14 20:49:21 +00:00
cpu coreboot: Introduce stage-specific architecture for coreboot 2014-05-09 04:41:47 +00:00
device coreboot: Introduce stage-specific architecture for coreboot 2014-05-09 04:41:47 +00:00
drivers SPI: Add Eon EN25S64 support. 2014-05-09 22:00:56 +00:00
ec chromeos: Unconditionally clear the EC recovery request 2014-05-07 03:33:49 +00:00
include vboot: Add a new post code for TPM failure 2014-05-12 22:12:41 +00:00
lib Print segment clean up information only when required. 2014-05-14 20:49:25 +00:00
mainboard storm: initialize dynamic cbmem properly 2014-05-14 20:52:37 +00:00
northbridge coreboot: Rename coreboot_ram stage to ramstage 2014-05-07 23:30:23 +00:00
soc storm: initialize dynamic cbmem properly 2014-05-14 20:52:37 +00:00
southbridge coreboot: Rename coreboot_ram stage to ramstage 2014-05-07 23:30:23 +00:00
superio pnp: Allow setting of misc register 0xf4 in device tree 2013-12-20 00:37:38 +00:00
vendorcode vboot: Add a new post code for TPM failure 2014-05-12 22:12:41 +00:00
Kconfig coreboot: Introduce stage-specific architecture for coreboot 2014-05-09 04:41:47 +00:00