Yu-Ping Wu b229c120f7 soc/mediatek: Allow specifying multiple EINT base registers ... Unlike MT8186/MT8188/MT8192/MT8195, MT8196 has 5 EINT base registers, each with a different number of EINT bits. In preparation for the upcoming MT8196 EINT unmasking support, replace the `eint_event_reg` struct (which has a hardcoded register number) with an array `eint_event` to specify the EINT base register(s). BUG=none TEST=emerge-geralt coreboot BRANCH=none Change-Id: I86fd3109c9ff72f33b9fea45587d012b003a34ba Signed-off-by: Yu-Ping Wu <yupingso@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/86033 Reviewed-by: Yidi Lin <yidilin@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>		2025-01-18 13:09:40 +00:00
..
amd	soc/amd/phoenix/pci_irq_routing.c: Populate PCI IRQ routing table	2025-01-17 17:52:54 +00:00
cavium	soc/cavium: Fix non matching types	2024-08-30 07:34:47 +00:00
example/min86
ibm/power9	3rdparty/open-power-signing-utils: add SecureBoot utility for OpenPOWER	2024-09-06 13:55:50 +00:00
intel	tree: Use boolean for deep_s{3,5}_enable_{ac,dc}	2025-01-16 23:16:03 +00:00
mediatek	soc/mediatek: Allow specifying multiple EINT base registers	2025-01-18 13:09:40 +00:00
nvidia	arch/arm: Add a few ARM targets as supported by CLANG	2024-08-23 10:40:01 +00:00
qualcomm	qualcomm/common: Remove dead code	2025-01-14 06:36:38 +00:00
rockchip	arch/arm: Add a few ARM targets as supported by CLANG	2024-08-23 10:40:01 +00:00
samsung	samsung/exynos5250: Replace 'unsigned long int' by 'unsigned long'	2025-01-15 08:32:16 +00:00
sifive	tree: Remove unused <assert.h>	2024-11-19 00:40:04 +00:00
ti	soc/ti/am335x: Remove superfluous formats	2024-08-02 14:45:13 +00:00
ucb/riscv