tree: Use boolean for deep_s{3,5}_enable_{ac,dc}

Change-Id: I1621e98e7925b140c608f893a6680c9384bac2f0
Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/86020
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jérémy Compostella <jeremy.compostella@intel.com>

src/mainboard/51nb/x210/devicetree.cb

@@ -10,10 +10,10 @@ chip soc/intel/skylake
 	}"
 
 	# Enable deep Sx states
-	register "deep_s3_enable_ac" = "1"
-	register "deep_s3_enable_dc" = "1"
-	register "deep_s5_enable_ac" = "1"
-	register "deep_s5_enable_dc" = "1"
+	register "deep_s3_enable_ac" = "true"
+	register "deep_s3_enable_dc" = "true"
+	register "deep_s5_enable_ac" = "true"
+	register "deep_s5_enable_dc" = "true"
 	register "deep_sx_config" = "DSX_EN_LAN_WAKE_PIN"
 
 	register "eist_enable" = "true"

src/mainboard/erying/tgl/devicetree.cb

@@ -17,10 +17,10 @@ chip soc/intel/tigerlake
 	register "eist_enable" = "1"
 	register "enable_c6dram" = "1"
 
-	register "deep_s3_enable_ac" = "1"
-	register "deep_s3_enable_dc" = "1"
-	register "deep_s5_enable_ac" = "1"
-	register "deep_s5_enable_dc" = "1"
+	register "deep_s3_enable_ac" = "true"
+	register "deep_s3_enable_dc" = "true"
+	register "deep_s5_enable_ac" = "true"
+	register "deep_s5_enable_dc" = "true"
 
 	# PME routing
 	register "pmc_gpe0_dw0" = "PMC_GPP_R"

src/mainboard/facebook/monolith/devicetree.cb

@@ -1,7 +1,7 @@
 chip soc/intel/skylake
 
-	register "deep_s5_enable_ac" = "0"
-	register "deep_s5_enable_dc" = "0"
+	register "deep_s5_enable_ac" = "false"
+	register "deep_s5_enable_dc" = "false"
 	register "deep_sx_config" = "DSX_EN_LAN_WAKE_PIN"
 
 	# GPE configuration

src/mainboard/google/eve/devicetree.cb

@@ -13,10 +13,10 @@ chip soc/intel/skylake
 	}"
 
 	# Enable deep Sx states
-	register "deep_s3_enable_ac" = "0"
-	register "deep_s3_enable_dc" = "1"
-	register "deep_s5_enable_ac" = "1"
-	register "deep_s5_enable_dc" = "1"
+	register "deep_s3_enable_ac" = "false"
+	register "deep_s3_enable_dc" = "true"
+	register "deep_s5_enable_ac" = "true"
+	register "deep_s5_enable_dc" = "true"
 	register "deep_sx_config" = "DSX_EN_LAN_WAKE_PIN | DSX_EN_WAKE_PIN"
 
 	register "eist_enable" = "true"

src/mainboard/google/fizz/variants/baseboard/devicetree.cb

@@ -10,10 +10,10 @@ chip soc/intel/skylake
 	}"
 
 	# Deep Sx states
-	register "deep_s3_enable_ac" = "0"
-	register "deep_s3_enable_dc" = "0"
-	register "deep_s5_enable_ac" = "1"
-	register "deep_s5_enable_dc" = "1"
+	register "deep_s3_enable_ac" = "false"
+	register "deep_s3_enable_dc" = "false"
+	register "deep_s5_enable_ac" = "true"
+	register "deep_s5_enable_dc" = "true"
 	register "deep_sx_config" = "DSX_EN_LAN_WAKE_PIN | DSX_EN_WAKE_PIN"
 
 	register "eist_enable" = "true"

src/mainboard/google/glados/devicetree.cb

@@ -13,10 +13,10 @@ chip soc/intel/skylake
 	}"
 
 	# Enable deep Sx states
-	register "deep_s3_enable_ac" = "0"
-	register "deep_s3_enable_dc" = "0"
-	register "deep_s5_enable_ac" = "1"
-	register "deep_s5_enable_dc" = "1"
+	register "deep_s3_enable_ac" = "false"
+	register "deep_s3_enable_dc" = "false"
+	register "deep_s5_enable_ac" = "true"
+	register "deep_s5_enable_dc" = "true"
 	register "deep_sx_config" = "DSX_EN_LAN_WAKE_PIN"
 
 	# GPE configuration

src/mainboard/google/poppy/variants/atlas/devicetree.cb

@@ -13,10 +13,10 @@ chip soc/intel/skylake
 	}"
 
 	# Deep Sx states
-	register "deep_s3_enable_ac" = "0"
-	register "deep_s3_enable_dc" = "0"
-	register "deep_s5_enable_ac" = "1"
-	register "deep_s5_enable_dc" = "1"
+	register "deep_s3_enable_ac" = "false"
+	register "deep_s3_enable_dc" = "false"
+	register "deep_s5_enable_ac" = "true"
+	register "deep_s5_enable_dc" = "true"
 	register "deep_sx_config" = "DSX_EN_LAN_WAKE_PIN | DSX_EN_WAKE_PIN | DSX_DIS_AC_PRESENT_PD"
 
 	# GPE configuration

src/mainboard/google/poppy/variants/baseboard/devicetree.cb

@@ -4,10 +4,10 @@ chip soc/intel/skylake
 	register "gfx" = "GMA_STATIC_DISPLAYS(0)"
 
 	# Deep Sx states
-	register "deep_s3_enable_ac" = "0"
-	register "deep_s3_enable_dc" = "0"
-	register "deep_s5_enable_ac" = "1"
-	register "deep_s5_enable_dc" = "1"
+	register "deep_s3_enable_ac" = "false"
+	register "deep_s3_enable_dc" = "false"
+	register "deep_s5_enable_ac" = "true"
+	register "deep_s5_enable_dc" = "true"
 	register "deep_sx_config" = "DSX_EN_LAN_WAKE_PIN | DSX_EN_WAKE_PIN | DSX_DIS_AC_PRESENT_PD"
 
 	# GPE configuration

src/mainboard/google/poppy/variants/nami/devicetree.cb

@@ -13,10 +13,10 @@ chip soc/intel/skylake
 	}"
 
 	# Deep Sx states
-	register "deep_s3_enable_ac" = "0"
-	register "deep_s3_enable_dc" = "1"
-	register "deep_s5_enable_ac" = "1"
-	register "deep_s5_enable_dc" = "1"
+	register "deep_s3_enable_ac" = "false"
+	register "deep_s3_enable_dc" = "true"
+	register "deep_s5_enable_ac" = "true"
+	register "deep_s5_enable_dc" = "true"
 	register "deep_sx_config" = "DSX_EN_LAN_WAKE_PIN | DSX_DIS_AC_PRESENT_PD"
 
 	# GPE configuration

src/mainboard/google/poppy/variants/nautilus/devicetree.cb

@@ -13,10 +13,10 @@ chip soc/intel/skylake
 	}"
 
 	# Deep Sx states
-	register "deep_s3_enable_ac" = "0"
-	register "deep_s3_enable_dc" = "0"
-	register "deep_s5_enable_ac" = "1"
-	register "deep_s5_enable_dc" = "1"
+	register "deep_s3_enable_ac" = "false"
+	register "deep_s3_enable_dc" = "false"
+	register "deep_s5_enable_ac" = "true"
+	register "deep_s5_enable_dc" = "true"
 	register "deep_sx_config" = "DSX_EN_LAN_WAKE_PIN | DSX_EN_WAKE_PIN | DSX_DIS_AC_PRESENT_PD"
 
 	# GPE configuration

src/mainboard/google/poppy/variants/nocturne/devicetree.cb

@@ -4,10 +4,10 @@ chip soc/intel/skylake
 	register "gfx" = "GMA_STATIC_DISPLAYS(0)"
 
 	# Deep Sx states
-	register "deep_s3_enable_ac" = "0"
-	register "deep_s3_enable_dc" = "0"
-	register "deep_s5_enable_ac" = "1"
-	register "deep_s5_enable_dc" = "1"
+	register "deep_s3_enable_ac" = "false"
+	register "deep_s3_enable_dc" = "false"
+	register "deep_s5_enable_ac" = "true"
+	register "deep_s5_enable_dc" = "true"
 	register "deep_sx_config" = "DSX_EN_LAN_WAKE_PIN | DSX_DIS_AC_PRESENT_PD"
 
 	register "eist_enable" = "true"

src/mainboard/google/poppy/variants/rammus/devicetree.cb

@@ -13,10 +13,10 @@ chip soc/intel/skylake
 	}"
 
 	# Deep Sx states
-	register "deep_s3_enable_ac" = "0"
-	register "deep_s3_enable_dc" = "0"
-	register "deep_s5_enable_ac" = "1"
-	register "deep_s5_enable_dc" = "1"
+	register "deep_s3_enable_ac" = "false"
+	register "deep_s3_enable_dc" = "false"
+	register "deep_s5_enable_ac" = "true"
+	register "deep_s5_enable_dc" = "true"
 	register "deep_sx_config" = "DSX_EN_LAN_WAKE_PIN | DSX_EN_WAKE_PIN | DSX_DIS_AC_PRESENT_PD"
 
 	# GPE configuration

src/mainboard/google/poppy/variants/soraka/devicetree.cb

@@ -13,10 +13,10 @@ chip soc/intel/skylake
 	}"
 
 	# Deep Sx states
-	register "deep_s3_enable_ac" = "0"
-	register "deep_s3_enable_dc" = "0"
-	register "deep_s5_enable_ac" = "1"
-	register "deep_s5_enable_dc" = "1"
+	register "deep_s3_enable_ac" = "false"
+	register "deep_s3_enable_dc" = "false"
+	register "deep_s5_enable_ac" = "true"
+	register "deep_s5_enable_dc" = "true"
 	register "deep_sx_config" = "DSX_EN_LAN_WAKE_PIN | DSX_EN_WAKE_PIN | DSX_DIS_AC_PRESENT_PD"
 
 	# GPE configuration

src/mainboard/intel/kblrvp/variants/baseboard/devicetree.cb

@@ -1,8 +1,8 @@
 chip soc/intel/skylake
 
 	# Enable deep Sx states
-	register "deep_s5_enable_ac" = "0"
-	register "deep_s5_enable_dc" = "0"
+	register "deep_s5_enable_ac" = "false"
+	register "deep_s5_enable_dc" = "false"
 	register "deep_sx_config" = "DSX_EN_LAN_WAKE_PIN"
 
 	# GPE configuration

src/mainboard/intel/kblrvp/variants/rvp7/overridetree.cb

@@ -1,8 +1,8 @@
 chip soc/intel/skylake
 
 	# Enable deep Sx states
-	register "deep_s5_enable_ac" = "1"
-	register "deep_s5_enable_dc" = "1"
+	register "deep_s5_enable_ac" = "true"
+	register "deep_s5_enable_dc" = "true"
 
 	# VR Settings Configuration for 4 Domains
 	#+----------------+-------+-------+-------+-------+

src/mainboard/intel/kblrvp/variants/rvp8/overridetree.cb

@@ -1,8 +1,8 @@
 chip soc/intel/skylake
 
 	# Enable deep Sx states
-	register "deep_s3_enable_ac" = "0"
-	register "deep_s3_enable_dc" = "0"
+	register "deep_s3_enable_ac" = "false"
+	register "deep_s3_enable_dc" = "false"
 
 	# FSP Configuration
 	register "ScsEmmcHs400Enabled" = "0"

src/mainboard/intel/kunimitsu/devicetree.cb

@@ -1,8 +1,8 @@
 chip soc/intel/skylake
 
 	# Enable deep Sx states
-	register "deep_s5_enable_ac" = "1"
-	register "deep_s5_enable_dc" = "1"
+	register "deep_s5_enable_ac" = "true"
+	register "deep_s5_enable_dc" = "true"
 	register "deep_sx_config" = "DSX_EN_LAN_WAKE_PIN"
 
 	# GPE configuration

src/mainboard/intel/saddlebrook/devicetree.cb

@@ -2,8 +2,8 @@
 
 chip soc/intel/skylake
 
-	register "deep_s5_enable_ac" = "0"
-	register "deep_s5_enable_dc" = "0"
+	register "deep_s5_enable_ac" = "false"
+	register "deep_s5_enable_dc" = "false"
 	register "deep_sx_config" = "DSX_EN_LAN_WAKE_PIN"
 
 	# GPE configuration

src/mainboard/lenovo/m900_tiny/devicetree.cb

@@ -2,8 +2,8 @@
 
 chip soc/intel/skylake
 	# Enable deep Sx states
-	register "deep_s5_enable_ac" = "1"
-	register "deep_s5_enable_dc" = "1"
+	register "deep_s5_enable_ac" = "true"
+	register "deep_s5_enable_dc" = "true"
 	register "deep_sx_config" = "DSX_EN_LAN_WAKE_PIN | DSX_EN_WAKE_PIN"
 
 	register "eist_enable" = "true"

src/mainboard/libretrend/lt1000/devicetree.cb

@@ -1,10 +1,10 @@
 chip soc/intel/skylake
 
 	# Enable deep Sx states
-	register "deep_s3_enable_ac" = "0"
-	register "deep_s3_enable_dc" = "0"
-	register "deep_s5_enable_ac" = "1"
-	register "deep_s5_enable_dc" = "1"
+	register "deep_s3_enable_ac" = "false"
+	register "deep_s3_enable_dc" = "false"
+	register "deep_s5_enable_ac" = "true"
+	register "deep_s5_enable_dc" = "true"
 	register "deep_sx_config" = "DSX_EN_WAKE_PIN"
 
 	register "eist_enable" = "true"

src/mainboard/protectli/vault_kbl/devicetree.cb

@@ -1,10 +1,10 @@
 chip soc/intel/skylake
 
 	# Enable deep Sx states
-	register "deep_s3_enable_ac" = "0"
-	register "deep_s3_enable_dc" = "0"
-	register "deep_s5_enable_ac" = "1"
-	register "deep_s5_enable_dc" = "1"
+	register "deep_s3_enable_ac" = "false"
+	register "deep_s3_enable_dc" = "false"
+	register "deep_s5_enable_ac" = "true"
+	register "deep_s5_enable_dc" = "true"
 	register "deep_sx_config" = "DSX_EN_WAKE_PIN | DSX_DIS_AC_PRESENT_PD"
 	register "s0ix_enable" = true
 

src/mainboard/purism/librem_skl/devicetree.cb

@@ -12,10 +12,10 @@ chip soc/intel/skylake
 		.backlight_pwm_hz	= 200,
 	}"
 
-	register "deep_s3_enable_ac" = "0"
-	register "deep_s3_enable_dc" = "0"
-	register "deep_s5_enable_ac" = "0"
-	register "deep_s5_enable_dc" = "0"
+	register "deep_s3_enable_ac" = "false"
+	register "deep_s3_enable_dc" = "false"
+	register "deep_s5_enable_ac" = "false"
+	register "deep_s5_enable_dc" = "false"
 	register "deep_sx_config" = "DSX_EN_LAN_WAKE_PIN"
 
 	register "eist_enable" = "true"

src/mainboard/razer/blade_stealth_kbl/devicetree.cb

@@ -1,8 +1,8 @@
 chip soc/intel/skylake
-	register "deep_s3_enable_ac" = "0"
-	register "deep_s3_enable_dc" = "0"
-	register "deep_s5_enable_ac" = "0"
-	register "deep_s5_enable_dc" = "0"
+	register "deep_s3_enable_ac" = "false"
+	register "deep_s3_enable_dc" = "false"
+	register "deep_s5_enable_ac" = "false"
+	register "deep_s5_enable_dc" = "false"
 	register "deep_sx_config" = "DSX_EN_LAN_WAKE_PIN"
 
 	register "eist_enable" = "true"

src/soc/intel/elkhartlake/chip.h

@@ -133,10 +133,10 @@ struct soc_intel_elkhartlake_config {
 	bool dptf_enable;
 
 	/* Deep SX enable for both AC and DC */
-	int deep_s3_enable_ac;
-	int deep_s3_enable_dc;
-	int deep_s5_enable_ac;
-	int deep_s5_enable_dc;
+	bool deep_s3_enable_ac;
+	bool deep_s3_enable_dc;
+	bool deep_s5_enable_ac;
+	bool deep_s5_enable_dc;
 
 	/* Deep Sx Configuration
 	 *  DSX_EN_WAKE_PIN       - Enable WAKE# pin

src/soc/intel/tigerlake/chip.h

@@ -152,10 +152,10 @@ struct soc_intel_tigerlake_config {
 	bool dptf_enable;
 
 	/* Deep SX enable for both AC and DC */
-	int deep_s3_enable_ac;
-	int deep_s3_enable_dc;
-	int deep_s5_enable_ac;
-	int deep_s5_enable_dc;
+	bool deep_s3_enable_ac;
+	bool deep_s3_enable_dc;
+	bool deep_s5_enable_ac;
+	bool deep_s5_enable_dc;
 
 	/* Deep Sx Configuration
 	 *  DSX_EN_WAKE_PIN       - Enable WAKE# pin