Subrata Banik af9d809823 soc/qualcomm/x1p42100: Move coreboot stack to SSRAM ... This patch relocates the coreboot stack from the BSRAM (Boot IMEM) region to the SSRAM (Shared System RAM) region. The 16K stack definition is moved from: BSRAM region (0x14850000) To: SSRAM region (0x14680000) This move is crucial because the BSRAM region is actively cleared during the later stages of the IP loading process, which would wipe the stack and lead to instability. Placing the stack in the persistent SSRAM ensures it remains accessible throughout the early boot process. BUG=BUG=b:456953373 TEST=Able to build google/quenbi w/ new stack region. Change-Id: I59cd14fed2a5907bcbb8bed027dd5a55eb73e56d Signed-off-by: Subrata Banik <subratabanik@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/90137 Reviewed-by: Paul Menzel <paulepanter@mailbox.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org> Reviewed-by: Kapil Porwal <kapilporwal@google.com>		2025-11-22 17:23:48 +00:00
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amd	soc/amd/cezanne: Add SOC_AMD_RENOIR as a Cezanne variant	2025-11-20 17:39:08 +00:00
cavium
example/min86
ibm/power9	soc/power9/rom_media.c: find CBFS in PNOR	2025-08-28 20:14:01 +00:00
intel	soc/intel/pantherlake/romstage: Configure VGA mode 12 monochrome buffer	2025-11-19 13:56:41 +00:00
mediatek	soc/mediatek/mt8196: Add dual display pipe path	2025-11-18 07:37:31 +00:00
nvidia
qualcomm	soc/qualcomm/x1p42100: Move coreboot stack to SSRAM	2025-11-22 17:23:48 +00:00
rockchip
samsung	samsung/exynos5250: Replace 'unsigned long int' by 'unsigned long'	2025-01-15 08:32:16 +00:00
sifive
ti
ucb/riscv	soc/riscv/ucb: Switch to FDT parsing to get memory size	2025-02-26 17:11:09 +00:00
xilinx	soc/xilinx/zynq7000: Initial Xilinx Zynq 7000 SoC bringup	2025-01-23 00:41:01 +00:00