erebion/coreboot
1
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity Actions

soc/qualcomm/x1p42100: Move coreboot stack to SSRAM

Browse source 
This patch relocates the coreboot stack from the BSRAM (Boot IMEM)
region to the SSRAM (Shared System RAM) region.

The 16K stack definition is moved from:

BSRAM region (0x14850000)

To:

SSRAM region (0x14680000)

This move is crucial because the BSRAM region is actively cleared during
the later stages of the IP loading process, which would wipe the stack
and lead to instability. Placing the stack in the persistent SSRAM
ensures it remains accessible throughout the early boot process.

BUG=BUG=b:456953373
TEST=Able to build google/quenbi w/ new stack region.

Change-Id: I59cd14fed2a5907bcbb8bed027dd5a55eb73e56d
Signed-off-by: Subrata Banik <subratabanik@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/90137
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-by: Kapil Porwal <kapilporwal@google.com>
This commit is contained in:
Subrata Banik 2025-11-20 19:38:49 +00:00 • committed by Matt DeVillier
commit af9d809823
1 changed files with 7 additions and 7 deletions
Download patch file Download diff file Expand all files Collapse all files

14
src/soc/qualcomm/x1p42100/memlayout.ld
View file

@ -133,8 +133,6 @@
* 0x14857000 +----------------------------------------------------------+ |
* | VBOOT2_WORK | |
* 0x14854000 +----------------------------------------------------------+ |
* | STACK | |
* 0x14850000 +----------------------------------------------------------+ |
* | TTB (Translation Table Base) | |
* 0x14842000 +----------------------------------------------------------+ |
* | TIMESTAMP | |
@ -154,11 +152,13 @@
* | ... Usable memory ... | ^
* 0x146AB000 +----------------------------------------------------------+ |
* | shared_imem | |
* 0x146AA000 +----------------------------------------------------------+ SSRAM
* | ... Usable memory ... | |
* 0x146AA000 +----------------------------------------------------------+ |
* | ... Usable memory ... | SSRAM
* 0x146A5000 +----------------------------------------------------------+ |
* | qcsdi | v
* 0x14699000 +----------------------------------------------------------+ <---------
* | qcsdi | |
* 0x14699000 +----------------------------------------------------------+ |
* | STACK | v
* 0x14680000 +----------------------------------------------------------+ <---------
* | ... (Memory not mapped: Unavailable) ... | XXXXXXXXX
* 0x0B100000 +----------------------------------------------------------+ <---------
* | ... Usable memory ... | ^
@ -180,6 +180,7 @@ SECTIONS
AOPSRAM_END(0x0B100000)
SSRAM_START(0x14680000)
STACK(0x14680000, 16K)
REGION(qcsdi, 0x14699000, 48K, 4K)
REGION(shared_imem, 0x146AA000, 0x1000, 4K)
SSRAM_END(0x146AC000)
@ -191,7 +192,6 @@ SECTIONS
PRERAM_CBFS_CACHE(0x14828000, 103K)
TIMESTAMP(0x14841C00, 1K)
TTB(0x14842000, 56K)
STACK(0x14850000, 16K)
VBOOT2_WORK(0x14854000, 12K)
DMA_COHERENT(0x14857000, 8K)
REGION(qclib_serial_log, 0x1485B000, 4K, 4K)