coreboot/src
Matt DeVillier a45590126f soc/intel/jasperlake: add soc_acpi_name entry for IGD
JSL was missing an entry for the IGD, preventing the use of
DRIVERS_GFX_GENERIC since the call to acpi_device_scope() for it
returned null. Add the missing IGD entry, consistent with other
modern Intel SoCs.

TEST=build/boot google/magolor with chip drivers/gfx/generic entry
and verify SSDT entry correctly created.

Change-Id: Idf1d8992b45c60f68fd2b156c6e7cae816df84b4
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/91064
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Reviewed-by: Jérémy Compostella <jeremy.compostella@intel.com>
2026-02-04 21:05:34 +00:00
..
acpi acpi: Add enums for TPM2 start method 2026-01-14 17:03:18 +00:00
arch arch/x86: Add pre- and post-memory platform hooks to romstage 2026-01-30 08:31:21 +00:00
commonlib commonlib/list: Add list_length() and more to API 2026-02-01 02:25:52 +00:00
console console: Fix flushing for slow consoles 2025-10-02 22:44:46 +00:00
cpu cpu/intel/smm/gen1/smmrelocate: Fix comments 2026-01-31 22:37:29 +00:00
device device/smbus: Add i2c_eeprom_read 2026-02-03 22:16:02 +00:00
drivers drivers/generic/gpio_keys: Set ACPI status to HIDDEN 2026-02-04 21:00:26 +00:00
ec ec/google/chromeec: Implement host command to read lid state 2026-02-03 18:19:20 +00:00
include device/smbus: Add i2c_eeprom_read 2026-02-03 22:16:02 +00:00
lib lib/fit: Switch to commonlib/list public API 2026-02-01 02:25:58 +00:00
mainboard mb/google/{nissa,trulo}: select HAVE_CHIPSETINIT_BINARY 2026-02-04 21:00:34 +00:00
northbridge nb/intel/sandybridge: Advertise all MCH BARs 2026-02-02 13:57:17 +00:00
sbom
security soc/intel/common: Add opt-in runtime control for BIOS SMM write 2026-01-29 14:41:46 +00:00
soc soc/intel/jasperlake: add soc_acpi_name entry for IGD 2026-02-04 21:05:34 +00:00
southbridge device/smbus: Add i2c_eeprom_read 2026-02-03 22:16:02 +00:00
superio sio/nuvoton/common: Refactor nuvoton_pnp_*_config_state() 2026-01-03 03:40:12 +00:00
vendorcode vendorcode/amd/opensil: Add Turin OpenSIL 2026-01-28 13:32:33 +00:00
Kconfig arch/x86/ioapic.c: Support 8-bit IOAPIC IDs 2026-01-13 16:19:43 +00:00