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arch/x86/ioapic.c: Support 8-bit IOAPIC IDs

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AMD systems support 8-bit IOAPIC IDs. Some silicon initialization code
modules, like OpenSIL, may allocate an 8-bit ID by default. To respect
that configuration or set ID properly in coreboot, whole 8-bit ID field
has to be cleared and set.

Add new IOAPIC_8BIT_ID Kconfig option to allow setting 8-bit long IOAPIC
IDs.

TEST=Set IOAPIC IDs starting with 240 on Gigabyte MZ33-AR1.

Change-Id: Ie85b2272b0bc64a95d76c5677816941f1334901d
Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/89476
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
This commit is contained in:
Michał Żygowski 2025-10-06 10:45:59 +02:00 • committed by Matt DeVillier
commit f00a2ff7b8
2 changed files with 17 additions and 2 deletions
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7
src/Kconfig
View file

@ -919,6 +919,13 @@ config IOAPIC
default y if SMP
default n
config IOAPIC_8BIT_ID
bool
default n
depends on IOAPIC
help
Select this option if the hardware support 8bit long IOAPIC IDs.
config USE_WATCHDOG_ON_BOOT
bool
default n

12
src/arch/x86/ioapic.c
View file

@ -129,13 +129,21 @@ static void route_i8259_irq0(uintptr_t ioapic_base)
static void set_ioapic_id(uintptr_t ioapic_base, u8 ioapic_id)
{
int i;
u32 reg;
printk(BIOS_DEBUG, "IOAPIC: Initializing IOAPIC at %" PRIxPTR "\n",
ioapic_base);
printk(BIOS_DEBUG, "IOAPIC: ID = 0x%02x\n", ioapic_id);
io_apic_write(ioapic_base, 0x00,
(io_apic_read(ioapic_base, 0x00) & 0xf0ffffff) | (ioapic_id << 24));
reg = io_apic_read(ioapic_base, 0x00);
if (CONFIG(IOAPIC_8BIT_ID))
reg &= 0x00ffffff;
else
reg &= 0xf0ffffff;
reg |= (ioapic_id << 24);
io_apic_write(ioapic_base, 0x00, reg);
printk(BIOS_SPEW, "IOAPIC: Dumping registers\n");
for (i = 0; i < 3; i++)