coreboot/src/soc
Patrick Rudolph 97bf77e52e soc/amd/common/block/lpc: Limit ROM2 to 16MiB
Don't map more than 16MiB in ROM2 decode window when the SPI ROM
size is bigger than 16MiB.

TEST: amd/birman+ still boots with bigger SPI flash sizes.

Change-Id: Ie811f6a38363f2e900611b3f3f407a94d8137c89
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/86582
Reviewed-by: Maximilian Brune <maximilian.brune@9elements.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2025-03-10 15:21:04 +00:00
..
amd soc/amd/common/block/lpc: Limit ROM2 to 16MiB 2025-03-10 15:21:04 +00:00
cavium soc/cavium: Fix non matching types 2024-08-30 07:34:47 +00:00
example/min86 soc: Add SPDX license headers to Kconfig files 2024-02-18 02:03:37 +00:00
ibm/power9 3rdparty/open-power-signing-utils: add SecureBoot utility for OpenPOWER 2024-09-06 13:55:50 +00:00
intel soc/intel/pantherlake: Bind SoC config VR settings to respective UPD 2025-03-10 15:20:48 +00:00
mediatek soc/mediatek/mt8196: Eliminate mt6685_hw.h and mt6685_rtc_hw.h 2025-03-10 04:04:59 +00:00
nvidia arch/arm: Add a few ARM targets as supported by CLANG 2024-08-23 10:40:01 +00:00
qualcomm qualcomm/common: Remove dead code 2025-01-14 06:36:38 +00:00
rockchip arch/arm: Add a few ARM targets as supported by CLANG 2024-08-23 10:40:01 +00:00
samsung samsung/exynos5250: Replace 'unsigned long int' by 'unsigned long' 2025-01-15 08:32:16 +00:00
sifive tree: Remove unused <assert.h> 2024-11-19 00:40:04 +00:00
ti soc/ti/am335x: Remove superfluous formats 2024-08-02 14:45:13 +00:00
ucb/riscv soc/riscv/ucb: Switch to FDT parsing to get memory size 2025-02-26 17:11:09 +00:00
xilinx soc/xilinx/zynq7000: Initial Xilinx Zynq 7000 SoC bringup 2025-01-23 00:41:01 +00:00