Yidi Lin 8deb8e94ad soc/mediatek/mt8196: Correct assert conditions ... Correct the assert conditions in dptx_hal_setswing_preemphasis() and dptx_hal_phy_set_swing_preemphasis(). BRANCH=rauru BUG=b:376357839 TEST=Verify FW screen with a 4 lanes panel on Hylia Change-Id: I8830b05c976ea2ba987de6333b93e2394d3403ba Signed-off-by: Yidi Lin <yidilin@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/86302 Reviewed-by: Yu-Ping Wu <yupingso@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>		2025-02-07 12:43:26 +00:00
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common	soc/mediatek/mt8196: Add pi_img loader in ramstage	2025-01-27 23:58:02 +00:00
mt8173	soc/mediatek/common: Rename GPT_MHZ to TIMER_MHZ for readability	2024-12-21 16:09:23 +00:00
mt8183	tree: Remove unused <assert.h>	2024-11-19 00:40:04 +00:00
mt8186	soc/mediatek: Allow specifying multiple EINT base registers	2025-01-18 13:09:40 +00:00
mt8188	soc/mediatek: Allow specifying multiple EINT base registers	2025-01-18 13:09:40 +00:00
mt8189	soc/mediatek/mt8189: Enable timer compensation v2.5	2024-12-24 11:22:38 +00:00
mt8192	soc/mediatek: Allow specifying multiple EINT base registers	2025-01-18 13:09:40 +00:00
mt8195	soc/mediatek: Allow specifying multiple EINT base registers	2025-01-18 13:09:40 +00:00
mt8196	soc/mediatek/mt8196: Correct assert conditions	2025-02-07 12:43:26 +00:00