soc/mediatek/mt8189: Enable timer compensation v2.5

Enable timer compensation v2.5 for MT8189 systimer.

BUG=b:379008996
BRANCH=none
TEST=Check SYSTIMER_BASE register is configurated correctly.

Change-Id: I28c051c2e51481464f5dacb4c93f41e4f7e62501
Signed-off-by: Ke Zheng <ot_ke.zheng@mediatek.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/85689
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Reviewed-by: Yidi Lin <yidilin@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Ke Zheng 2024-09-18 19:43:21 +08:00 committed by Yidi Lin
commit d4c80054a4
2 changed files with 5 additions and 2 deletions

View file

@ -4,7 +4,7 @@ ifeq ($(CONFIG_SOC_MEDIATEK_MT8189),y)
all-y += ../common/gpio.c ../common/gpio_op.c gpio.c
all-$(CONFIG_SPI_FLASH) += spi.c
all-y += timer.c
all-y += ../common/timer_prepare.c timer.c
all-y += ../common/uart.c
bootblock-y += bootblock.c

View file

@ -8,8 +8,11 @@
#include <arch/lib_helpers.h>
#include <commonlib/helpers.h>
#include <delay.h>
#include <soc/timer.h>
void init_timer(void)
{
raw_write_cntfrq_el0(13 * MHz);
timer_prepare();
raw_write_cntfrq_el0(TIMER_MHZ * MHz);
}