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Aaron Durbin 821ce0e72c rambi: enable PS2 mode for VNN and VCC 
Enable the PS2 mode for the VNN and VCC's
voltage regulator. It only gets enabled on
C0 and later parts.

BUG=chrome-os-partner:24542
BRANCH=baytrail
TEST=Built and booted b3.

Change-Id: Id96b5527227ec31da1e5cd106791fe45576b063b
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/183596
2014-01-24 23:35:07 +00:00
..
arch arm: Thumb ALL the things! 2014-01-14 03:29:48 +00:00
console ARM: Generalize armv7 as arm. 2013-10-02 09:18:44 +00:00
cpu cpu/intel: allow non-packaged scoped turbo setting 2014-01-15 04:52:13 +00:00
device pnp: Allow setting of misc register 0xf4 in device tree 2013-12-20 00:37:38 +00:00
drivers Haswell/falco/peppy/slippy: continue to clean up FUI. 2013-12-19 01:17:37 +00:00
ec chromeec: add function to reboot on unexpected image 2014-01-10 00:11:54 +00:00
include baytrail: snapshot power state in romstage 2014-01-09 20:15:55 +00:00
lib baytrail: snapshot power state in romstage 2014-01-09 20:15:55 +00:00
mainboard rambi: enable PS2 mode for VNN and VCC 2014-01-24 23:35:07 +00:00
northbridge peppy and falco: set panel power timings in northbridge, using devicetree, not mainboards 2013-12-23 08:55:32 +00:00
soc baytrail: add option for enabling PS2 mode 2014-01-24 23:35:03 +00:00
southbridge libpayload: find source of input characters 2014-01-19 04:15:03 +00:00
superio pnp: Allow setting of misc register 0xf4 in device tree 2013-12-20 00:37:38 +00:00
vendorcode VBOOT: Set virtual recovery switch based on EC Software Sync 2014-01-23 19:32:35 +00:00
Kconfig armv8: add support for armv8 cpu 2014-01-07 02:48:47 +00:00