coreboot/src
Ronald G. Minnich 7e944208a1 tegra and tegra124: Bring up graphics
Changes to standard includes and files to define constants
and prototypes. Code from nvidia that turns on the display,
with lots of changes for coreboot.

With this code, which is going to be cleaned up, we get a display
in coreboot and depthcharge.

BUG=None
TEST=Builds, boots, and displays a color bar pattern from coreboot. Depthcharge
starts up, and we see the dev mode scary screen, just in time for Halloween.
BRANCH=None

Change-Id: I0eada9a7386e6f623cf8708144b0f6e850e97d50
Signed-off-by: Ronald G. Minnich <rminnich@google.com>
Reviewed-on: https://chromium-review.googlesource.com/174613
Reviewed-by: Gabe Black <gabeblack@chromium.org>
Tested-by: Ronald Minnich <rminnich@chromium.org>
Commit-Queue: Gabe Black <gabeblack@chromium.org>
2013-10-29 14:21:41 +00:00
..
arch nyan: tegra124: Enable I, D and L2 caches in romstage. 2013-10-29 02:59:07 +00:00
console ARM: Generalize armv7 as arm. 2013-10-02 09:18:44 +00:00
cpu x86: Add SMM helper functions to MP infrastructure 2013-10-23 04:08:19 +00:00
device ARM: Generalize armv7 as arm. 2013-10-02 09:18:44 +00:00
drivers drivers/gma: remove unused code 2013-10-11 20:36:54 +00:00
ec chromeec: Implement full battery workaround at 6% 2013-09-16 23:31:17 +00:00
include rmodule: consolidate rmodule stage loading 2013-10-24 18:06:13 +00:00
lib cbfs: fix load_stage_from_cbfs() for CONFIG_RELOCATABLE_RAMSTAGE 2013-10-25 00:28:56 +00:00
mainboard tegra and tegra124: Bring up graphics 2013-10-29 14:21:41 +00:00
northbridge haswell: Report x32 memory as "x8 or x32" 2013-10-23 21:27:19 +00:00
soc tegra and tegra124: Bring up graphics 2013-10-29 14:21:41 +00:00
southbridge lynxpoint: Allow to always route USB3 ports to XHCI 2013-10-22 21:42:00 +00:00
superio Drop prototype guarding for romcc 2013-05-10 11:55:20 -07:00
vendorcode rmodule: consolidate rmodule stage loading 2013-10-24 18:06:13 +00:00
Kconfig x86: add HAVE_REFCODE_BLOB option 2013-10-24 18:06:07 +00:00