1f12249ec0
Select the discrete TBT controller driver, and configure the necessary GPIOs for the Alpine Ridge TBT controller to be fully functional. Add ACPI to ensure the TBT controller properly handles S3 sleep and resume. Update the documentation w/r/t TBT functionality. TEST=build/boot Lenovo T480, boot Linux, verify all TBT-related PCI devices populated, lower USB-C port works for USB data and PCIe. Change-Id: Ie5586fa72ed6819b9d1c37373c21605d39bad7b4 Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/88490 Reviewed-by: Patrick Rudolph <patrick.rudolph@9elements.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> |
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| .. | ||
| _static | ||
| acpi | ||
| arch | ||
| community | ||
| contributing | ||
| drivers | ||
| getting_started | ||
| gfx | ||
| infrastructure | ||
| internals | ||
| lib | ||
| mainboard | ||
| northbridge | ||
| releases | ||
| RFC | ||
| sbom | ||
| security | ||
| soc | ||
| superio | ||
| technotes | ||
| tutorial | ||
| util | ||
| vendorcode | ||
| .gitignore | ||
| .mdl_style.rb | ||
| acronyms.md | ||
| AMD-S3.txt | ||
| beginverbatim.tex | ||
| cbfs.txt | ||
| codeflow.svg | ||
| conf.py | ||
| COPYING | ||
| coreboot_logo.bmp | ||
| coreboot_logo.png | ||
| coreboot_logo.svg | ||
| corebootBuildingGuide.tex | ||
| distributions.md | ||
| documentation_license.md | ||
| endverbatim.tex | ||
| external_docs.md | ||
| gcov.txt | ||
| hypertransport.svg | ||
| index.md | ||
| Makefile | ||
| Makefile.sphinx | ||
| payloads.md | ||
| POSTCODES | ||
| util.md | ||
