coreboot/src/southbridge/intel
Angel Pons 67e3579d61 sb/intel/lynxpoint: Enable PCIe Relaxed Order
Follow Lynx Point PCH reference code version 1.9.1 to enable PCIe
Relaxed Order.

Change-Id: If7ba4e826adfc8c220ecc68c4a456fbe3cb99667
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/57504
Reviewed-by: Lean Sheng Tan <tanleansheng@outlook.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Benjamin Doron <benjamin.doron00@gmail.com>
2025-09-25 16:06:18 +00:00
..
bd82x6x sb/intel/bd82x6x: Fix CPU replaced check 2025-09-02 17:08:06 +00:00
common sb/intel/common/smbus: Use proper delay instruction 2025-08-24 20:20:56 +00:00
i82371eb tree: Remove blank lines before '}' and after '{' 2024-04-11 19:19:08 +00:00
i82801dx
i82801gx i945: Use nullptr instead of NULL 2024-10-14 15:31:08 +00:00
i82801ix tree: Include static.h for remaining devicetree usages 2024-11-10 19:12:22 +00:00
i82801jx tree: Include static.h for remaining devicetree usages 2024-11-10 19:12:22 +00:00
i82870 tree: Remove unused <assert.h> 2024-11-19 00:40:04 +00:00
ibexpeak sb/inte/common/gpio: Implement gpio_input() and gpio_output() 2025-07-25 17:07:16 +00:00
lynxpoint sb/intel/lynxpoint: Enable PCIe Relaxed Order 2025-09-25 16:06:18 +00:00